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linux/arch/xtensa
Alexandre Ghiti 7a92fc8b4d mm: Introduce flush_cache_vmap_early()
The pcpu setup when using the page allocator sets up a new vmalloc
mapping very early in the boot process, so early that it cannot use the
flush_cache_vmap() function which may depend on structures not yet
initialized (for example in riscv, we currently send an IPI to flush
other cpus TLB).

But on some architectures, we must call flush_cache_vmap(): for example,
in riscv, some uarchs can cache invalid TLB entries so we need to flush
the new established mapping to avoid taking an exception.

So fix this by introducing a new function flush_cache_vmap_early() which
is called right after setting the new page table entry and before
accessing this new mapping. This new function implements a local flush
tlb on riscv and is no-op for other architectures (same as today).

Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Dennis Zhou <dennis@kernel.org>
2023-12-14 00:23:17 -08:00
..
boot xtensa: boot/lib: fix function prototypes 2023-09-20 05:03:30 -07:00
configs treewide: drop CONFIG_EMBEDDED 2023-08-21 13:46:25 -07:00
include mm: Introduce flush_cache_vmap_early() 2023-12-14 00:23:17 -08:00
kernel TTY/Serial changes for 6.7-rc1 2023-11-03 15:44:25 -10:00
lib xtensa: umulsidi3: fix conditional expression 2023-09-20 05:03:22 -07:00
mm xtensa: tlb: include <asm/tlb.h> for missing prototype 2023-09-20 05:03:21 -07:00
platforms xtensa: iss/network: make functions static 2023-09-20 05:03:21 -07:00
variants
Kbuild
Kconfig Xtensa updates for v6.6 2023-09-07 10:30:17 -07:00
Kconfig.debug xtensa: dump userspace code around the exception PC 2023-06-24 06:34:27 -07:00
Makefile kbuild: remove head-y syntax 2022-10-02 18:06:03 +09:00