5f53a56af5
Add INTCS support for the sh73a0 processor. The interrupts on the sh73a0 processor are managed through controllers such as GIC, INTCS and INTCA. The ARM cores use the GIC as primary interrupt controller and the INTCS and INTCA are hanging off the GIC as cascaded interrupt controllers. Peripherals connected both to the GIC and the INTC controllers should if possible only use the GIC. If no GIC connection is available then INTCS and INTCA may be used instead. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
42 lines
1.3 KiB
C
42 lines
1.3 KiB
C
#ifndef __ARCH_MACH_COMMON_H
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#define __ARCH_MACH_COMMON_H
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extern struct sys_timer shmobile_timer;
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extern void shmobile_setup_console(void);
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struct clk;
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extern int clk_init(void);
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extern void sh7367_init_irq(void);
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extern void sh7367_add_early_devices(void);
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extern void sh7367_add_standard_devices(void);
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extern void sh7367_clock_init(void);
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extern void sh7367_pinmux_init(void);
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extern struct clk sh7367_extalb1_clk;
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extern struct clk sh7367_extal2_clk;
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extern void sh7377_init_irq(void);
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extern void sh7377_add_early_devices(void);
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extern void sh7377_add_standard_devices(void);
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extern void sh7377_clock_init(void);
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extern void sh7377_pinmux_init(void);
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extern struct clk sh7377_extalc1_clk;
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extern struct clk sh7377_extal2_clk;
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extern void sh7372_init_irq(void);
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extern void sh7372_add_early_devices(void);
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extern void sh7372_add_standard_devices(void);
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extern void sh7372_clock_init(void);
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extern void sh7372_pinmux_init(void);
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extern struct clk sh7372_extal1_clk;
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extern struct clk sh7372_extal2_clk;
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extern void sh73a0_init_irq(void);
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extern void sh73a0_add_early_devices(void);
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extern void sh73a0_add_standard_devices(void);
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extern void sh73a0_clock_init(void);
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extern void sh73a0_pinmux_init(void);
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extern struct clk sh73a0_extal1_clk;
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extern struct clk sh73a0_extal2_clk;
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#endif /* __ARCH_MACH_COMMON_H */
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