5f53a56af5
Add INTCS support for the sh73a0 processor. The interrupts on the sh73a0 processor are managed through controllers such as GIC, INTCS and INTCA. The ARM cores use the GIC as primary interrupt controller and the INTCS and INTCA are hanging off the GIC as cascaded interrupt controllers. Peripherals connected both to the GIC and the INTC controllers should if possible only use the GIC. If no GIC connection is available then INTCS and INTCA may be used instead. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org> |
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| .. | ||
| clkdev.h | ||
| common.h | ||
| dma.h | ||
| entry-macro-gic.S | ||
| entry-macro-intc.S | ||
| entry-macro.S | ||
| gpio.h | ||
| hardware.h | ||
| io.h | ||
| irqs.h | ||
| memory.h | ||
| sh73a0.h | ||
| sh7367.h | ||
| sh7372.h | ||
| sh7377.h | ||
| system.h | ||
| timex.h | ||
| uncompress.h | ||
| vmalloc.h | ||