0515e022e1
There're: - 8 archs (arc, arm64, include, mips, powerpc, s390, sh, x86) that support pte_pgprot(). - 2 archs (x86, sparc) that support pmd_pgprot(). - 1 arch (x86) that support pud_pgprot(). Always define them to be used in generic code, and then we don't need to fiddle with "#ifdef"s when doing so. Link: https://lkml.kernel.org/r/20240826204353.2228736-9-peterx@redhat.com Signed-off-by: Peter Xu <peterx@redhat.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Cc: Alexander Gordeev <agordeev@linux.ibm.com> Cc: Alex Williamson <alex.williamson@redhat.com> Cc: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Christian Borntraeger <borntraeger@linux.ibm.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: David Hildenbrand <david@redhat.com> Cc: Gavin Shan <gshan@redhat.com> Cc: Gerald Schaefer <gerald.schaefer@linux.ibm.com> Cc: Heiko Carstens <hca@linux.ibm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Matthew Wilcox <willy@infradead.org> Cc: Niklas Schnelle <schnelle@linux.ibm.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Ryan Roberts <ryan.roberts@arm.com> Cc: Sean Christopherson <seanjc@google.com> Cc: Sven Schnelle <svens@linux.ibm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vasily Gorbik <gor@linux.ibm.com> Cc: Will Deacon <will@kernel.org> Cc: Zi Yan <ziy@nvidia.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
221 lines
6.0 KiB
C
221 lines
6.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_POWERPC_PGTABLE_H
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#define _ASM_POWERPC_PGTABLE_H
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#ifndef __ASSEMBLY__
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#include <linux/mmdebug.h>
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#include <linux/mmzone.h>
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#include <asm/processor.h> /* For TASK_SIZE */
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#include <asm/mmu.h>
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#include <asm/page.h>
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#include <asm/tlbflush.h>
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struct mm_struct;
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#endif /* !__ASSEMBLY__ */
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#ifdef CONFIG_PPC_BOOK3S
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#include <asm/book3s/pgtable.h>
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#else
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#include <asm/nohash/pgtable.h>
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#endif /* !CONFIG_PPC_BOOK3S */
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/*
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* Protection used for kernel text. We want the debuggers to be able to
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* set breakpoints anywhere, so don't write protect the kernel text
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* on platforms where such control is possible.
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*/
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#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) || \
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defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)
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#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
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#else
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#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
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#endif
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/* Make modules code happy. We don't set RO yet */
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#define PAGE_KERNEL_EXEC PAGE_KERNEL_X
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/* Advertise special mapping type for AGP */
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#define PAGE_AGP (PAGE_KERNEL_NC)
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#define HAVE_PAGE_AGP
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#ifndef __ASSEMBLY__
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#define PFN_PTE_SHIFT PTE_RPN_SHIFT
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void set_ptes(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
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pte_t pte, unsigned int nr);
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#define set_ptes set_ptes
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#define update_mmu_cache(vma, addr, ptep) \
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update_mmu_cache_range(NULL, vma, addr, ptep, 1)
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#ifndef MAX_PTRS_PER_PGD
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#define MAX_PTRS_PER_PGD PTRS_PER_PGD
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#endif
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/* Keep these as a macros to avoid include dependency mess */
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#define pte_page(x) pfn_to_page(pte_pfn(x))
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#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
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static inline unsigned long pte_pfn(pte_t pte)
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{
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return (pte_val(pte) & PTE_RPN_MASK) >> PTE_RPN_SHIFT;
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}
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/*
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* Select all bits except the pfn
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*/
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#define pte_pgprot pte_pgprot
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static inline pgprot_t pte_pgprot(pte_t pte)
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{
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unsigned long pte_flags;
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pte_flags = pte_val(pte) & ~PTE_RPN_MASK;
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return __pgprot(pte_flags);
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}
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static inline pgprot_t pgprot_nx(pgprot_t prot)
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{
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return pte_pgprot(pte_exprotect(__pte(pgprot_val(prot))));
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}
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#define pgprot_nx pgprot_nx
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#ifndef pmd_page_vaddr
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static inline const void *pmd_page_vaddr(pmd_t pmd)
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{
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return __va(pmd_val(pmd) & ~PMD_MASKED_BITS);
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}
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#define pmd_page_vaddr pmd_page_vaddr
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#endif
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/*
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* ZERO_PAGE is a global shared page that is always zero: used
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* for zero-mapped memory areas etc..
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*/
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extern unsigned long empty_zero_page[];
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#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
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extern pgd_t swapper_pg_dir[];
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extern void paging_init(void);
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void poking_init(void);
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extern unsigned long ioremap_bot;
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extern const pgprot_t protection_map[16];
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/* can we use this in kvm */
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unsigned long vmalloc_to_phys(void *vmalloc_addr);
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void pgtable_cache_add(unsigned int shift);
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#ifdef CONFIG_PPC32
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void __init *early_alloc_pgtable(unsigned long size);
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#endif
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pte_t *early_pte_alloc_kernel(pmd_t *pmdp, unsigned long va);
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#if defined(CONFIG_STRICT_KERNEL_RWX) || defined(CONFIG_PPC32)
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void mark_initmem_nx(void);
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#else
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static inline void mark_initmem_nx(void) { }
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#endif
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#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
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int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,
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pte_t *ptep, pte_t entry, int dirty);
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pgprot_t __phys_mem_access_prot(unsigned long pfn, unsigned long size,
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pgprot_t vma_prot);
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struct file;
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static inline pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
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unsigned long size, pgprot_t vma_prot)
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{
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return __phys_mem_access_prot(pfn, size, vma_prot);
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}
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#define __HAVE_PHYS_MEM_ACCESS_PROT
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void __update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep);
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/*
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* This gets called at the end of handling a page fault, when
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* the kernel has put a new PTE into the page table for the process.
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* We use it to ensure coherency between the i-cache and d-cache
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* for the page which has just been mapped in.
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* On machines which use an MMU hash table, we use this to put a
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* corresponding HPTE into the hash table ahead of time, instead of
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* waiting for the inevitable extra hash-table miss exception.
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*/
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static inline void update_mmu_cache_range(struct vm_fault *vmf,
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struct vm_area_struct *vma, unsigned long address,
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pte_t *ptep, unsigned int nr)
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{
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if ((mmu_has_feature(MMU_FTR_HPTE_TABLE) && !radix_enabled()) ||
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(IS_ENABLED(CONFIG_PPC_E500) && IS_ENABLED(CONFIG_HUGETLB_PAGE)))
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__update_mmu_cache(vma, address, ptep);
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}
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/*
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* When used, PTE_FRAG_NR is defined in subarch pgtable.h
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* so we are sure it is included when arriving here.
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*/
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#ifdef PTE_FRAG_NR
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static inline void *pte_frag_get(mm_context_t *ctx)
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{
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return ctx->pte_frag;
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}
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static inline void pte_frag_set(mm_context_t *ctx, void *p)
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{
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ctx->pte_frag = p;
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}
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#else
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#define PTE_FRAG_NR 1
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#define PTE_FRAG_SIZE_SHIFT PAGE_SHIFT
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#define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT)
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static inline void *pte_frag_get(mm_context_t *ctx)
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{
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return NULL;
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}
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static inline void pte_frag_set(mm_context_t *ctx, void *p)
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{
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}
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#endif
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#define pmd_pgtable pmd_pgtable
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static inline pgtable_t pmd_pgtable(pmd_t pmd)
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{
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return (pgtable_t)pmd_page_vaddr(pmd);
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}
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#ifdef CONFIG_PPC64
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int __meminit vmemmap_populated(unsigned long vmemmap_addr, int vmemmap_map_size);
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bool altmap_cross_boundary(struct vmem_altmap *altmap, unsigned long start,
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unsigned long page_size);
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/*
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* mm/memory_hotplug.c:mhp_supports_memmap_on_memory goes into details
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* some of the restrictions. We don't check for PMD_SIZE because our
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* vmemmap allocation code can fallback correctly. The pageblock
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* alignment requirement is met using altmap->reserve blocks.
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*/
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#define arch_supports_memmap_on_memory arch_supports_memmap_on_memory
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static inline bool arch_supports_memmap_on_memory(unsigned long vmemmap_size)
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{
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if (!radix_enabled())
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return false;
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/*
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* With 4K page size and 2M PMD_SIZE, we can align
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* things better with memory block size value
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* starting from 128MB. Hence align things with PMD_SIZE.
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*/
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if (IS_ENABLED(CONFIG_PPC_4K_PAGES))
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return IS_ALIGNED(vmemmap_size, PMD_SIZE);
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return true;
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}
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#endif /* CONFIG_PPC64 */
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_POWERPC_PGTABLE_H */
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