afd36e9d91
Add various clock controllers found in the MT7988 SoC to existing bindings (if applicable) and add files for the new ethwarp, mcusys and xfi-pll clock controllers not previously present in any SoC. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/07e76a544ce4392bcb88e34d5480e99bb7994618.1702849494.git.daniel@makrotopia.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
56 lines
1.2 KiB
YAML
56 lines
1.2 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/mediatek,ethsys.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek ethsys controller
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description:
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The available clocks are defined in dt-bindings/clock/mt*-clk.h.
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maintainers:
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- James Liao <jamesjj.liao@mediatek.com>
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- mediatek,mt2701-ethsys
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- mediatek,mt7622-ethsys
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- mediatek,mt7629-ethsys
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- mediatek,mt7981-ethsys
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- mediatek,mt7986-ethsys
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- mediatek,mt7988-ethsys
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- const: syscon
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- items:
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- const: mediatek,mt7623-ethsys
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- const: mediatek,mt2701-ethsys
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- const: syscon
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reg:
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maxItems: 1
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"#clock-cells":
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const: 1
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"#reset-cells":
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const: 1
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required:
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- reg
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- "#clock-cells"
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- "#reset-cells"
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additionalProperties: false
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examples:
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- |
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clock-controller@1b000000 {
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compatible = "mediatek,mt2701-ethsys", "syscon";
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reg = <0x1b000000 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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