263291fa44
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it was merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Acked-by: Sam Ravnborg <sam@ravnborg.org> Link: https://lore.kernel.org/all/20230718143211.1066810-1-robh@kernel.org/ Signed-off-by: Rob Herring <robh@kernel.org>
90 lines
2.2 KiB
C
90 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* leon_pci.c: LEON Host PCI support
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*
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* Copyright (C) 2011 Aeroflex Gaisler AB, Daniel Hellstrom
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*
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* Code is partially derived from pcic.c
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*/
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/export.h>
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#include <asm/leon.h>
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#include <asm/leon_pci.h>
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/* The LEON architecture does not rely on a BIOS or bootloader to setup
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* PCI for us. The Linux generic routines are used to setup resources,
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* reset values of configuration-space register settings are preserved.
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*
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* PCI Memory and Prefetchable Memory is direct-mapped. However I/O Space is
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* accessed through a Window which is translated to low 64KB in PCI space, the
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* first 4KB is not used so 60KB is available.
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*/
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void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
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{
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LIST_HEAD(resources);
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struct pci_bus *root_bus;
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struct pci_host_bridge *bridge;
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int ret;
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bridge = pci_alloc_host_bridge(0);
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if (!bridge)
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return;
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pci_add_resource_offset(&resources, &info->io_space,
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info->io_space.start - 0x1000);
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pci_add_resource(&resources, &info->mem_space);
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info->busn.flags = IORESOURCE_BUS;
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pci_add_resource(&resources, &info->busn);
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list_splice_init(&resources, &bridge->windows);
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bridge->dev.parent = &ofdev->dev;
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bridge->sysdata = info;
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bridge->busnr = 0;
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bridge->ops = info->ops;
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bridge->swizzle_irq = pci_common_swizzle;
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bridge->map_irq = info->map_irq;
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ret = pci_scan_root_bus_bridge(bridge);
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if (ret) {
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pci_free_host_bridge(bridge);
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return;
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}
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root_bus = bridge->bus;
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/* Assign devices with resources */
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pci_assign_unassigned_resources();
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pci_bus_add_devices(root_bus);
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}
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int pcibios_enable_device(struct pci_dev *dev, int mask)
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{
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struct resource *res;
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u16 cmd, oldcmd;
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int i;
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pci_read_config_word(dev, PCI_COMMAND, &cmd);
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oldcmd = cmd;
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pci_dev_for_each_resource(dev, res, i) {
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/* Only set up the requested stuff */
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if (!(mask & (1<<i)))
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continue;
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if (res->flags & IORESOURCE_IO)
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cmd |= PCI_COMMAND_IO;
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if (res->flags & IORESOURCE_MEM)
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cmd |= PCI_COMMAND_MEMORY;
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}
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if (cmd != oldcmd) {
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pci_info(dev, "enabling device (%04x -> %04x)\n", oldcmd, cmd);
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pci_write_config_word(dev, PCI_COMMAND, cmd);
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}
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return 0;
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}
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