Mike Frysinger fb4b5d3a37 Blackfin: handle BF561 Core B memory regions better when SMP=n ... Rather than assume Core B is always run with caches turned on, let people load into any of the on-chip memory regions. It is their business how the SRAM/Cache regions are utilized, so don't prevent them from being able to load into them. Signed-off-by: Mike Frysinger <vapier@gentoo.org>		2009-07-16 01:52:24 -04:00
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anomaly.h	Blackfin: update anomaly lists to match latest sheets/usage	2009-07-16 01:52:17 -04:00
bf561.h
bfin_serial_5xx.h	tty: Blackin CTS/RTS	2009-04-07 08:44:05 -07:00
blackfin.h	Blackfin: unify memory map headers	2009-06-22 21:16:07 -04:00
cdefBF561.h	Blackfin: add MDMA defines to make cross-variant coding easier	2009-06-12 06:11:26 -04:00
defBF561.h	Blackfin: add MDMA defines to make cross-variant coding easier	2009-06-12 06:11:26 -04:00
dma.h	Blackfin arch: push bf561 PERIPHERAL_MAP oddity into bf561-specific code	2009-01-07 23:14:39 +08:00
gpio.h	Blackfin arch: gpio.h split into machine subfolders like already done for BF54x	2009-01-07 23:14:39 +08:00
irq.h
mem_map.h	Blackfin: handle BF561 Core B memory regions better when SMP=n	2009-07-16 01:52:24 -04:00
portmux.h	Blackfin arch: Fix bug - Run "reboot" hangs bf518-ezbrd	2009-02-04 16:49:45 +08:00
smp.h	Blackfin arch: SMP supporting patchset: BF561 related code	2009-01-07 23:14:39 +08:00