a14d11a0f5
To gather the architecture requirements of the "private/global expedited" membarrier commands. The file will be expanded to integrate further information about the membarrier syscall (as needed/desired in the future). While at it, amend some related inline comments in the membarrier codebase. Suggested-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Signed-off-by: Andrea Parri <parri.andrea@gmail.com> Reviewed-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Link: https://lore.kernel.org/r/20240131144936.29190-3-parri.andrea@gmail.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
40 lines
1.6 KiB
ReStructuredText
40 lines
1.6 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0
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========================
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membarrier() System Call
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========================
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MEMBARRIER_CMD_{PRIVATE,GLOBAL}_EXPEDITED - Architecture requirements
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=====================================================================
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Memory barriers before updating rq->curr
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----------------------------------------
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The commands MEMBARRIER_CMD_PRIVATE_EXPEDITED and MEMBARRIER_CMD_GLOBAL_EXPEDITED
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require each architecture to have a full memory barrier after coming from
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user-space, before updating rq->curr. This barrier is implied by the sequence
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rq_lock(); smp_mb__after_spinlock() in __schedule(). The barrier matches a full
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barrier in the proximity of the membarrier system call exit, cf.
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membarrier_{private,global}_expedited().
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Memory barriers after updating rq->curr
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---------------------------------------
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The commands MEMBARRIER_CMD_PRIVATE_EXPEDITED and MEMBARRIER_CMD_GLOBAL_EXPEDITED
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require each architecture to have a full memory barrier after updating rq->curr,
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before returning to user-space. The schemes providing this barrier on the various
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architectures are as follows.
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- alpha, arc, arm, hexagon, mips rely on the full barrier implied by
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spin_unlock() in finish_lock_switch().
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- arm64 relies on the full barrier implied by switch_to().
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- powerpc, riscv, s390, sparc, x86 rely on the full barrier implied by
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switch_mm(), if mm is not NULL; they rely on the full barrier implied
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by mmdrop(), otherwise. On powerpc and riscv, switch_mm() relies on
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membarrier_arch_switch_mm().
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The barrier matches a full barrier in the proximity of the membarrier system call
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entry, cf. membarrier_{private,global}_expedited().
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