1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
145 lines
5.0 KiB
C
145 lines
5.0 KiB
C
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/* Driver for the Iomega MatchMaker parallel port SCSI HBA embedded in
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* the Iomega ZIP Plus drive
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*
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* (c) 1998 David Campbell campbell@torque.net
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*
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* Please note that I live in Perth, Western Australia. GMT+0800
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*/
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#ifndef _IMM_H
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#define _IMM_H
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#define IMM_VERSION "2.05 (for Linux 2.4.0)"
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/*
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* 10 Apr 1998 (Good Friday) - Received EN144302 by email from Iomega.
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* Scarry thing is the level of support from one of their managers.
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* The onus is now on us (the developers) to shut up and start coding.
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* 11Apr98 [ 0.10 ]
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*
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* --- SNIP ---
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*
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* It manages to find the drive which is a good start. Writing data during
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* data phase is known to be broken (due to requirements of two byte writes).
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* Removing "Phase" debug messages.
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*
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* PS: Took four hours of coding after I bought a drive.
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* ANZAC Day (Aus "War Veterans Holiday") 25Apr98 [ 0.14 ]
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*
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* Ten minutes later after a few fixes.... (LITERALLY!!!)
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* Have mounted disk, copied file, dismounted disk, remount disk, diff file
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* ----- It actually works!!! -----
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* 25Apr98 [ 0.15 ]
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*
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* Twenty minutes of mucking around, rearanged the IEEE negotiate mechanism.
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* Now have byte mode working (only EPP and ECP to go now... :=)
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* 26Apr98 [ 0.16 ]
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*
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* Thirty minutes of further coding results in EPP working on my machine.
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* 27Apr98 [ 0.17 ]
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*
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* Due to work commitments and inability to get a "true" ECP mode functioning
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* I have decided to code the parport support into imm.
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* 09Jun98 [ 0.18 ]
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*
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* Driver is now out of beta testing.
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* Support for parport has been added.
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* Now distributed with the ppa driver.
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* 12Jun98 [ 2.00 ]
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*
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* Err.. It appears that imm-2.00 was broken....
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* 18Jun98 [ 2.01 ]
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*
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* Patch applied to sync this against the Linux 2.1.x kernel code
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* Included qboot_zip.sh
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* 21Jun98 [ 2.02 ]
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*
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* Other clean ups include the follow changes:
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* CONFIG_SCSI_PPA_HAVE_PEDANTIC => CONFIG_SCSI_IZIP_EPP16
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* added CONFIG_SCSI_IZIP_SLOW_CTR option
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* [2.03]
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* Fix kernel panic on scsi timeout. 20Aug00 [2.04]
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*
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* Avoid io_request_lock problems.
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* John Cavan <johncavan@home.com> 16Nov00 [2.05]
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*/
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/* ------ END OF USER CONFIGURABLE PARAMETERS ----- */
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#include <linux/config.h>
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#include <linux/stddef.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/ioport.h>
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#include <linux/delay.h>
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#include <linux/proc_fs.h>
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#include <linux/stat.h>
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#include <linux/blkdev.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <asm/io.h>
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#include <scsi/scsi_host.h>
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/* batteries not included :-) */
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/*
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* modes in which the driver can operate
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*/
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#define IMM_AUTODETECT 0 /* Autodetect mode */
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#define IMM_NIBBLE 1 /* work in standard 4 bit mode */
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#define IMM_PS2 2 /* PS/2 byte mode */
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#define IMM_EPP_8 3 /* EPP mode, 8 bit */
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#define IMM_EPP_16 4 /* EPP mode, 16 bit */
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#define IMM_EPP_32 5 /* EPP mode, 32 bit */
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#define IMM_UNKNOWN 6 /* Just in case... */
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static char *IMM_MODE_STRING[] =
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{
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[IMM_AUTODETECT] = "Autodetect",
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[IMM_NIBBLE] = "SPP",
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[IMM_PS2] = "PS/2",
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[IMM_EPP_8] = "EPP 8 bit",
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[IMM_EPP_16] = "EPP 16 bit",
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#ifdef CONFIG_SCSI_IZIP_EPP16
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[IMM_EPP_32] = "EPP 16 bit",
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#else
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[IMM_EPP_32] = "EPP 32 bit",
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#endif
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[IMM_UNKNOWN] = "Unknown",
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};
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/* other options */
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#define IMM_BURST_SIZE 512 /* data burst size */
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#define IMM_SELECT_TMO 500 /* 500 how long to wait for target ? */
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#define IMM_SPIN_TMO 5000 /* 50000 imm_wait loop limiter */
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#define IMM_DEBUG 0 /* debugging option */
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#define IN_EPP_MODE(x) (x == IMM_EPP_8 || x == IMM_EPP_16 || x == IMM_EPP_32)
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/* args to imm_connect */
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#define CONNECT_EPP_MAYBE 1
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#define CONNECT_NORMAL 0
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#define r_dtr(x) (unsigned char)inb((x))
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#define r_str(x) (unsigned char)inb((x)+1)
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#define r_ctr(x) (unsigned char)inb((x)+2)
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#define r_epp(x) (unsigned char)inb((x)+4)
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#define r_fifo(x) (unsigned char)inb((x)) /* x must be base_hi */
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/* On PCI is: base+0x400 != base_hi */
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#define r_ecr(x) (unsigned char)inb((x)+2) /* x must be base_hi */
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#define w_dtr(x,y) outb(y, (x))
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#define w_str(x,y) outb(y, (x)+1)
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#define w_epp(x,y) outb(y, (x)+4)
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#define w_fifo(x,y) outb(y, (x)) /* x must be base_hi */
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#define w_ecr(x,y) outb(y, (x)+0x2) /* x must be base_hi */
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#ifdef CONFIG_SCSI_IZIP_SLOW_CTR
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#define w_ctr(x,y) outb_p(y, (x)+2)
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#else
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#define w_ctr(x,y) outb(y, (x)+2)
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#endif
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static int imm_engine(imm_struct *, struct scsi_cmnd *);
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#endif /* _IMM_H */
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