cbe9da029d
This adds initial support for the Renesas R0P7785LC0011RL board. This patch supports 29bit address mode only. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
67 lines
1.5 KiB
C
67 lines
1.5 KiB
C
/*
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* Author: Ian DaSilva (idasilva@mvista.com)
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*
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* Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
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*
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* May be copied or modified under the terms of the GNU General Public
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* License. See linux/COPYING for more information.
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*
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* PCI initialization for the Renesas R0P7785LC0011RL board
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* Based on arch/sh/drivers/pci/ops-r7780rp.c
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*
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pci.h>
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#include "pci-sh4.h"
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static char irq_tab[] __initdata = {
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65, 66, 67, 68,
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};
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int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
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{
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return irq_tab[slot];
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}
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static struct resource sh7785_io_resource = {
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.name = "SH7785_IO",
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.start = SH7780_PCI_IO_BASE,
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.end = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1,
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.flags = IORESOURCE_IO
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};
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static struct resource sh7785_mem_resource = {
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.name = "SH7785_mem",
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.start = SH7780_PCI_MEMORY_BASE,
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.end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1,
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.flags = IORESOURCE_MEM
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};
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struct pci_channel board_pci_channels[] = {
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{ &sh4_pci_ops, &sh7785_io_resource, &sh7785_mem_resource, 0, 0xff },
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{ NULL, NULL, NULL, 0, 0 },
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};
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EXPORT_SYMBOL(board_pci_channels);
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static struct sh4_pci_address_map sh7785_pci_map = {
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.window0 = {
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.base = SH7780_CS2_BASE_ADDR,
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.size = 0x04000000,
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},
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.window1 = {
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.base = SH7780_CS3_BASE_ADDR,
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.size = 0x04000000,
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},
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.flags = SH4_PCIC_NO_RESET,
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};
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int __init pcibios_init_platform(void)
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{
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return sh7780_pcic_init(&sh7785_pci_map);
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}
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