73b4390fb2
Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
82 lines
2.4 KiB
C
82 lines
2.4 KiB
C
/*
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* IDT RC32434 specific CPU feature overrides
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*
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* Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
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*
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* This file was derived from: include/asm-mips/cpu-features.h
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* Copyright (C) 2003, 2004 Ralf Baechle
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* Copyright (C) 2004 Maciej W. Rozycki
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the
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* Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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* Boston, MA 02110-1301, USA.
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*/
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#ifndef __ASM_MACH_RC32434_CPU_FEATURE_OVERRIDES_H
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#define __ASM_MACH_RC32434_CPU_FEATURE_OVERRIDES_H
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/*
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* The IDT RC32434 SOC has a built-in MIPS 4Kc core.
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*/
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#define cpu_has_tlb 1
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#define cpu_has_4kex 1
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#define cpu_has_3k_cache 0
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#define cpu_has_4k_cache 1
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#define cpu_has_tx39_cache 0
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#define cpu_has_sb1_cache 0
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#define cpu_has_fpu 0
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#define cpu_has_32fpr 0
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#define cpu_has_counter 1
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#define cpu_has_watch 1
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#define cpu_has_divec 1
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#define cpu_has_vce 0
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#define cpu_has_cache_cdex_p 0
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#define cpu_has_cache_cdex_s 0
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#define cpu_has_prefetch 1
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#define cpu_has_mcheck 1
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#define cpu_has_ejtag 1
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#define cpu_has_llsc 1
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#define cpu_has_mips16 0
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#define cpu_has_mdmx 0
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#define cpu_has_mips3d 0
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#define cpu_has_smartmips 0
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#define cpu_has_vtag_icache 0
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/* #define cpu_has_dc_aliases ? */
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/* #define cpu_has_ic_fills_f_dc ? */
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/* #define cpu_has_pindexed_dcache ? */
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/* #define cpu_icache_snoops_remote_store ? */
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#define cpu_has_mips32r1 1
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#define cpu_has_mips32r2 0
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#define cpu_has_mips64r1 0
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#define cpu_has_mips64r2 0
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#define cpu_has_dsp 0
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#define cpu_has_mipsmt 0
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/* #define cpu_has_nofpuex ? */
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#define cpu_has_64bits 0
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#define cpu_has_64bit_zero_reg 0
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#define cpu_has_64bit_gp_regs 0
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#define cpu_has_64bit_addresses 0
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#define cpu_has_inclusive_pcaches 0
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#define cpu_dcache_line_size() 16
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#define cpu_icache_line_size() 16
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#endif /* __ASM_MACH_RC32434_CPU_FEATURE_OVERRIDES_H */
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