Jon Hunter 2956994168 clk: tegra: Add the APB2APE audio clock on Tegra210 ... The APB2APE clock for the audio subsystem is required for powering up the audio power domain and accessing the various modules in this subsystem on Tegra210 devices. Add this clock for Tegra210. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>		2016-02-02 15:49:29 +01:00
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arm
clk
clock	clk: tegra: Add the APB2APE audio clock on Tegra210	2016-02-02 15:49:29 +01:00
dma	devicetree: Add bindings documentation for Analog Devices AXI-DMAC	2015-08-23 18:55:10 +05:30
gpio	gpio: add DT bindings for existing consumer flags	2015-10-02 04:25:53 -07:00
i2c	dt-bindings: add header for generic I2C flags in bindings	2015-08-24 14:05:09 +02:00
iio
input	devicetree: bindings: Use linux-event-codes.h for evdev codes	2015-10-16 15:32:15 -07:00
interrupt-controller
leds	dt-bindings: fixes some incorrect header guards	2015-12-08 15:06:54 +01:00
media	[media] c8sectpfe: Add DT bindings documentation for c8sectpfe driver	2015-08-11 15:57:21 -03:00
memory	memory: tegra: Add Tegra210 support	2015-08-13 16:07:52 +02:00
mfd	dt-bindings: fixes some incorrect header guards	2015-12-08 15:06:54 +01:00
net
phy	phy: Add binding document for Pistachio USB2.0 PHY	2015-06-21 21:53:37 +02:00
pinctrl	Add minimal device tree support for dra62x also known j5eco. It is	2015-12-31 16:25:22 +01:00
power	ARM: bcm2835: add rpi power domain driver	2015-12-21 20:00:41 -08:00
pwm
regulator
reset	ARM: SoC driver updates for v4.5	2016-01-20 18:42:30 -08:00
soc
sound
spmi
thermal