e3e7d8d4ea
Fix the I/O access macros so that they work with externally connected devices accessed in little-endian mode over any bus width: * Use a set of macros to define I/O port- and memory operations borrowed from MIPS. * Allow subarchitecture to specify address- and data-mangling * Implement at32ap-specific port mangling (with build-time configurable bus width. Only one bus width at a time supported for now.) * Rewrite iowriteN and friends to use write[bwl] and friends (not the __raw counterparts.) This has been tested using pata_pcmcia to access a CompactFlash card connected to the EBI (16-bit bus width.) Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
32 lines
695 B
Plaintext
32 lines
695 B
Plaintext
if PLATFORM_AT32AP
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menu "Atmel AVR32 AP options"
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choice
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prompt "AT32AP7000 static memory bus width"
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depends on CPU_AT32AP7000
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default AP7000_16_BIT_SMC
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help
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Define the width of the AP7000 external static memory interface.
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This is used to determine how to mangle the address and/or data
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when doing little-endian port access.
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The current code can only support a single external memory bus
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width for all chip selects, excluding the flash (which is using
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raw access and is thus not affected by any of this.)
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config AP7000_32_BIT_SMC
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bool "32 bit"
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config AP7000_16_BIT_SMC
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bool "16 bit"
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config AP7000_8_BIT_SMC
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bool "8 bit"
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endchoice
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endmenu
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endif # PLATFORM_AT32AP
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