6f6f6a7029
Several platforms create IOMEM defines for casting to 'void __iomem *', and other platforms are incorrectly using __io() macro for the same purpose. This creates a common definition and removes all the platform specific versions. Rather than try to make linux/io.h and asm/io.h assembly safe, the assembly version of IOMEM is moved into asm/assembler.h. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Kevin Hilman <khilman@ti.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Cc: Ryan Mallon <rmallon@gmail.com> Cc: Eric Miao <eric.y.miao@gmail.com> Cc: Haojian Zhuang <haojian.zhuang@marvell.com> Acked-by: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Shawn Guo <shawn.guo@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Paul Walmsley <paul@pwsan.com> Acked-by: Viresh Kumar <viresh.kumar@st.com> Cc: Rajeev Kumar <rajeev-dlh.kumar@st.com> Cc: Colin Cross <ccross@android.com> Cc: Olof Johansson <olof@lixom.net> Cc: Stephen Warren <swarren@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
77 lines
2.0 KiB
C
77 lines
2.0 KiB
C
/*
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* arch/arm/mach-rpc/include/mach/hardware.h
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*
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* Copyright (C) 1996-1999 Russell King.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This file contains the hardware definitions of the RiscPC series machines.
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*/
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#ifndef __ASM_ARCH_HARDWARE_H
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#define __ASM_ARCH_HARDWARE_H
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#include <mach/memory.h>
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/*
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* What hardware must be present
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*/
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#define HAS_IOMD
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#define HAS_VIDC20
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/* Hardware addresses of major areas.
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* *_START is the physical address
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* *_SIZE is the size of the region
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* *_BASE is the virtual address
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*/
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#define RAM_SIZE 0x10000000
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#define RAM_START 0x10000000
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#define EASI_SIZE 0x08000000 /* EASI I/O */
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#define EASI_START 0x08000000
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#define EASI_BASE IOMEM(0xe5000000)
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#define IO_START 0x03000000 /* I/O */
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#define IO_SIZE 0x01000000
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#define IO_BASE IOMEM(0xe0000000)
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#define SCREEN_START 0x02000000 /* VRAM */
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#define SCREEN_END 0xdfc00000
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#define SCREEN_BASE 0xdf800000
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#define UNCACHEABLE_ADDR 0xdf010000
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/*
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* IO Addresses
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*/
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#define ECARD_EASI_BASE (EASI_BASE)
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#define VIDC_BASE (IO_BASE + 0x00400000)
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#define EXPMASK_BASE (IO_BASE + 0x00360000)
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#define ECARD_IOC4_BASE (IO_BASE + 0x00270000)
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#define ECARD_IOC_BASE (IO_BASE + 0x00240000)
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#define IOMD_BASE (IO_BASE + 0x00200000)
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#define IOC_BASE (IO_BASE + 0x00200000)
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#define ECARD_MEMC8_BASE (IO_BASE + 0x0002b000)
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#define FLOPPYDMA_BASE (IO_BASE + 0x0002a000)
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#define PCIO_BASE (IO_BASE + 0x00010000)
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#define ECARD_MEMC_BASE (IO_BASE + 0x00000000)
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#define vidc_writel(val) __raw_writel(val, VIDC_BASE)
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#define NETSLOT_BASE 0x0302b000
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#define NETSLOT_SIZE 0x00001000
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#define PODSLOT_IOC0_BASE 0x03240000
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#define PODSLOT_IOC4_BASE 0x03270000
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#define PODSLOT_IOC_SIZE (1 << 14)
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#define PODSLOT_MEMC_BASE 0x03000000
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#define PODSLOT_MEMC_SIZE (1 << 14)
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#define PODSLOT_EASI_BASE 0x08000000
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#define PODSLOT_EASI_SIZE (1 << 24)
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#define EXPMASK_STATUS (EXPMASK_BASE + 0x00)
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#define EXPMASK_ENABLE (EXPMASK_BASE + 0x04)
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#endif
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