0d4fdd321c
* Create mpc8548cds.dtsi * Move lbc, soc and pci0 nodes to mpc8548cds_32b.dtsi * Change cuImage.mpc8548cds to cuImage.mpc8548cds_32b * Rename mpc8548cds.dts to mpc8548cds_32b.dts Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
87 lines
2.2 KiB
Plaintext
87 lines
2.2 KiB
Plaintext
/*
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* MPC8548 CDS Device Tree Source (32-bit address map)
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*
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* Copyright 2006, 2008, 2011-2012 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/include/ "fsl/mpc8548si-pre.dtsi"
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/ {
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model = "MPC8548CDS";
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compatible = "MPC8548CDS", "MPC85xxCDS";
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memory {
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device_type = "memory";
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reg = <0 0 0x0 0x8000000>; // 128M at 0x0
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};
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board_lbc: lbc: localbus@e0005000 {
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reg = <0 0xe0005000 0 0x1000>;
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ranges = <0x0 0x0 0x0 0xff000000 0x01000000
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0x1 0x0 0x0 0xf8004000 0x00001000>;
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};
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board_soc: soc: soc8548@e0000000 {
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ranges = <0 0x0 0xe0000000 0x100000>;
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};
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board_pci0: pci0: pci@e0008000 {
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reg = <0 0xe0008000 0 0x1000>;
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ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x10000000
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0x1000000 0x0 0x00000000 0 0xe2000000 0x0 0x800000>;
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clock-frequency = <66666666>;
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};
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pci1: pci@e0009000 {
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reg = <0 0xe0009000 0 0x1000>;
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ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x10000000
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0x1000000 0x0 0x00000000 0 0xe2800000 0x0 0x800000>;
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clock-frequency = <66666666>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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/* IDSEL 0x15 */
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0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0
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0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
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0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
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0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
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};
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pci2: pcie@e000a000 {
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reg = <0 0xe000a000 0 0x1000>;
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ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xe3000000 0x0 0x100000>;
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pcie@0 {
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ranges = <0x2000000 0x0 0xa0000000
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0x2000000 0x0 0xa0000000
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0x0 0x20000000
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0x1000000 0x0 0x0
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0x1000000 0x0 0x0
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0x0 0x100000>;
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};
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};
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rio: rapidio@e00c0000 {
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reg = <0x0 0xe00c0000 0x0 0x20000>;
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port1 {
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ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
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};
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};
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};
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/*
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* mpc8548cds.dtsi must be last to ensure board_pci0 overrides pci0 settings
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* for interrupt-map & interrupt-map-mask.
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*/
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/include/ "fsl/mpc8548si-post.dtsi"
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/include/ "mpc8548cds.dtsi"
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