bbe888864e
This patch adds support for the ARMv7 cores. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
74 lines
1.4 KiB
ArmAsm
74 lines
1.4 KiB
ArmAsm
/*
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* We need constants.h for:
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* VMA_VM_MM
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* VMA_VM_FLAGS
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* VM_EXEC
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*/
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#include <asm/asm-offsets.h>
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#include <asm/thread_info.h>
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/*
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* vma_vm_mm - get mm pointer from vma pointer (vma->vm_mm)
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*/
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.macro vma_vm_mm, rd, rn
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ldr \rd, [\rn, #VMA_VM_MM]
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.endm
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/*
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* vma_vm_flags - get vma->vm_flags
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*/
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.macro vma_vm_flags, rd, rn
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ldr \rd, [\rn, #VMA_VM_FLAGS]
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.endm
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.macro tsk_mm, rd, rn
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ldr \rd, [\rn, #TI_TASK]
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ldr \rd, [\rd, #TSK_ACTIVE_MM]
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.endm
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/*
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* act_mm - get current->active_mm
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*/
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.macro act_mm, rd
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bic \rd, sp, #8128
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bic \rd, \rd, #63
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ldr \rd, [\rd, #TI_TASK]
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ldr \rd, [\rd, #TSK_ACTIVE_MM]
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.endm
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/*
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* mmid - get context id from mm pointer (mm->context.id)
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*/
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.macro mmid, rd, rn
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ldr \rd, [\rn, #MM_CONTEXT_ID]
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.endm
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/*
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* mask_asid - mask the ASID from the context ID
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*/
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.macro asid, rd, rn
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and \rd, \rn, #255
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.endm
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.macro crval, clear, mmuset, ucset
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#ifdef CONFIG_MMU
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.word \clear
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.word \mmuset
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#else
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.word \clear
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.word \ucset
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#endif
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.endm
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/*
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* cache_line_size - get the cache line size from the CSIDR register
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* (available on ARMv7+). It assumes that the CSSR register was configured
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* to access the L1 data cache CSIDR.
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*/
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.macro dcache_line_size, reg, tmp
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mrc p15, 1, \tmp, c0, c0, 0 @ read CSIDR
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and \tmp, \tmp, #7 @ cache line size encoding
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mov \reg, #16 @ size offset
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mov \reg, \reg, lsl \tmp @ actual cache line size
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.endm
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