1a7ff8ff6e
Tested on DM6446, DM355, DM6447, DA850 EVMs. Signed-off-by: Chaithrika U S <chaithrika@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
416 lines
10 KiB
C
416 lines
10 KiB
C
/*
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* TI DA850/OMAP-L138 EVM board
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*
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* Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
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*
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* Derived from: arch/arm/mach-davinci/board-da830-evm.c
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* Original Copyrights follow:
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*
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* 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <linux/i2c.h>
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#include <linux/i2c/at24.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <mach/common.h>
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#include <mach/irqs.h>
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#include <mach/cp_intc.h>
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#include <mach/da8xx.h>
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#include <mach/nand.h>
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#define DA850_EVM_PHY_MASK 0x1
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#define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
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#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
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#define DA850_LCD_PWR_PIN GPIO_TO_PIN(8, 10)
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#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
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#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
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static struct mtd_partition da850_evm_norflash_partition[] = {
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{
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.name = "NOR filesystem",
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.offset = 0,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = 0,
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},
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};
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static struct physmap_flash_data da850_evm_norflash_data = {
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.width = 2,
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.parts = da850_evm_norflash_partition,
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.nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
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};
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static struct resource da850_evm_norflash_resource[] = {
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{
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.start = DA8XX_AEMIF_CS2_BASE,
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.end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device da850_evm_norflash_device = {
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.name = "physmap-flash",
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.id = 0,
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.dev = {
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.platform_data = &da850_evm_norflash_data,
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},
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.num_resources = 1,
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.resource = da850_evm_norflash_resource,
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};
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/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
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* (128K blocks). It may be used instead of the (default) SPI flash
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* to boot, using TI's tools to install the secondary boot loader
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* (UBL) and U-Boot.
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*/
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struct mtd_partition da850_evm_nandflash_partition[] = {
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{
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.name = "u-boot env",
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.offset = 0,
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.size = SZ_128K,
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.mask_flags = MTD_WRITEABLE,
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},
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{
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.name = "UBL",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_128K,
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.mask_flags = MTD_WRITEABLE,
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},
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{
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.name = "u-boot",
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.offset = MTDPART_OFS_APPEND,
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.size = 4 * SZ_128K,
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.mask_flags = MTD_WRITEABLE,
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},
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{
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.name = "kernel",
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.offset = 0x200000,
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.size = SZ_2M,
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.mask_flags = 0,
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},
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{
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.name = "filesystem",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = 0,
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},
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};
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static struct davinci_nand_pdata da850_evm_nandflash_data = {
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.parts = da850_evm_nandflash_partition,
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.nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
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.ecc_mode = NAND_ECC_HW,
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.options = NAND_USE_FLASH_BBT,
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};
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static struct resource da850_evm_nandflash_resource[] = {
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{
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.start = DA8XX_AEMIF_CS3_BASE,
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.end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = DA8XX_AEMIF_CTL_BASE,
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.end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device da850_evm_nandflash_device = {
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.name = "davinci_nand",
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.id = 1,
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.dev = {
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.platform_data = &da850_evm_nandflash_data,
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},
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.num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
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.resource = da850_evm_nandflash_resource,
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};
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static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
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{
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I2C_BOARD_INFO("tlv320aic3x", 0x18),
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}
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};
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static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
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.bus_freq = 100, /* kHz */
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.bus_delay = 0, /* usec */
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};
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static struct davinci_uart_config da850_evm_uart_config __initdata = {
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.enabled_uarts = 0x7,
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};
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static struct platform_device *da850_evm_devices[] __initdata = {
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&da850_evm_nandflash_device,
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&da850_evm_norflash_device,
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};
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/* davinci da850 evm audio machine driver */
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static u8 da850_iis_serializer_direction[] = {
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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
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RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
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};
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static struct snd_platform_data da850_evm_snd_data = {
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.tx_dma_offset = 0x2000,
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.rx_dma_offset = 0x2000,
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.op_mode = DAVINCI_MCASP_IIS_MODE,
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.num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
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.tdm_slots = 2,
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.serial_dir = da850_iis_serializer_direction,
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.eventq_no = EVENTQ_1,
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.version = MCASP_VERSION_2,
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.txnumevt = 1,
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.rxnumevt = 1,
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};
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static int da850_evm_mmc_get_ro(int index)
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{
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return gpio_get_value(DA850_MMCSD_WP_PIN);
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}
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static int da850_evm_mmc_get_cd(int index)
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{
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return !gpio_get_value(DA850_MMCSD_CD_PIN);
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}
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static struct davinci_mmc_config da850_mmc_config = {
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.get_ro = da850_evm_mmc_get_ro,
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.get_cd = da850_evm_mmc_get_cd,
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.wires = 4,
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.version = MMC_CTLR_VERSION_2,
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};
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static int da850_lcd_hw_init(void)
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{
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int status;
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status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
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if (status < 0)
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return status;
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status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
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if (status < 0) {
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gpio_free(DA850_LCD_BL_PIN);
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return status;
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}
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gpio_direction_output(DA850_LCD_BL_PIN, 0);
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gpio_direction_output(DA850_LCD_PWR_PIN, 0);
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/* disable lcd backlight */
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gpio_set_value(DA850_LCD_BL_PIN, 0);
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/* disable lcd power */
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gpio_set_value(DA850_LCD_PWR_PIN, 0);
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/* enable lcd power */
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gpio_set_value(DA850_LCD_PWR_PIN, 1);
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/* enable lcd backlight */
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gpio_set_value(DA850_LCD_BL_PIN, 1);
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return 0;
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}
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#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
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#define DA8XX_AEMIF_ASIZE_16BIT 0x1
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static void __init da850_evm_init_nor(void)
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{
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void __iomem *aemif_addr;
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aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
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/* Configure data bus width of CS2 to 16 bit */
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writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
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DA8XX_AEMIF_ASIZE_16BIT,
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aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
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iounmap(aemif_addr);
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}
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#if defined(CONFIG_MTD_PHYSMAP) || \
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defined(CONFIG_MTD_PHYSMAP_MODULE)
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#define HAS_NOR 1
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#else
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#define HAS_NOR 0
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#endif
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#if defined(CONFIG_MMC_DAVINCI) || \
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defined(CONFIG_MMC_DAVINCI_MODULE)
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#define HAS_MMC 1
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#else
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#define HAS_MMC 0
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#endif
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static __init void da850_evm_init(void)
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{
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struct davinci_soc_info *soc_info = &davinci_soc_info;
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int ret;
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ret = da8xx_pinmux_setup(da850_nand_pins);
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if (ret)
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pr_warning("da850_evm_init: nand mux setup failed: %d\n",
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ret);
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ret = da8xx_pinmux_setup(da850_nor_pins);
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if (ret)
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pr_warning("da850_evm_init: nor mux setup failed: %d\n",
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ret);
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da850_evm_init_nor();
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platform_add_devices(da850_evm_devices,
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ARRAY_SIZE(da850_evm_devices));
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ret = da8xx_register_edma();
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if (ret)
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pr_warning("da850_evm_init: edma registration failed: %d\n",
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ret);
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ret = da8xx_pinmux_setup(da850_i2c0_pins);
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if (ret)
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pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
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ret);
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ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
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if (ret)
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pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
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ret);
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soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
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soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
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soc_info->emac_pdata->rmii_en = 0;
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ret = da8xx_pinmux_setup(da850_cpgmac_pins);
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if (ret)
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pr_warning("da850_evm_init: cpgmac mux setup failed: %d\n",
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ret);
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ret = da8xx_register_emac();
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if (ret)
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pr_warning("da850_evm_init: emac registration failed: %d\n",
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ret);
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ret = da8xx_register_watchdog();
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if (ret)
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pr_warning("da830_evm_init: watchdog registration failed: %d\n",
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ret);
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if (HAS_MMC) {
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if (HAS_NOR)
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pr_warning("WARNING: both NOR Flash and MMC/SD are "
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"enabled, but they share AEMIF pins.\n"
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"\tDisable one of them.\n");
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ret = da8xx_pinmux_setup(da850_mmcsd0_pins);
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if (ret)
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pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
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" %d\n", ret);
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ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
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if (ret)
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pr_warning("da850_evm_init: can not open GPIO %d\n",
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DA850_MMCSD_CD_PIN);
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gpio_direction_input(DA850_MMCSD_CD_PIN);
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ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
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if (ret)
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pr_warning("da850_evm_init: can not open GPIO %d\n",
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DA850_MMCSD_WP_PIN);
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gpio_direction_input(DA850_MMCSD_WP_PIN);
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ret = da8xx_register_mmcsd0(&da850_mmc_config);
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if (ret)
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pr_warning("da850_evm_init: mmcsd0 registration failed:"
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" %d\n", ret);
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}
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davinci_serial_init(&da850_evm_uart_config);
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i2c_register_board_info(1, da850_evm_i2c_devices,
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ARRAY_SIZE(da850_evm_i2c_devices));
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/*
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* shut down uart 0 and 1; they are not used on the board and
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* accessing them causes endless "too much work in irq53" messages
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* with arago fs
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*/
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__raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
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__raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
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ret = da8xx_pinmux_setup(da850_mcasp_pins);
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if (ret)
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pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
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ret);
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da8xx_init_mcasp(0, &da850_evm_snd_data);
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ret = da8xx_pinmux_setup(da850_lcdcntl_pins);
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if (ret)
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pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
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ret);
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ret = da850_lcd_hw_init();
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if (ret)
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pr_warning("da850_evm_init: lcd initialization failed: %d\n",
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ret);
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ret = da8xx_register_lcdc();
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if (ret)
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pr_warning("da850_evm_init: lcdc registration failed: %d\n",
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ret);
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}
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#ifdef CONFIG_SERIAL_8250_CONSOLE
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static int __init da850_evm_console_init(void)
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{
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return add_preferred_console("ttyS", 2, "115200");
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}
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console_initcall(da850_evm_console_init);
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#endif
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static __init void da850_evm_irq_init(void)
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{
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struct davinci_soc_info *soc_info = &davinci_soc_info;
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cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ,
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soc_info->intc_irq_prios);
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}
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static void __init da850_evm_map_io(void)
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{
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da850_init();
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}
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MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM")
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.phys_io = IO_PHYS,
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.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
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.boot_params = (DA8XX_DDR_BASE + 0x100),
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.map_io = da850_evm_map_io,
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.init_irq = da850_evm_irq_init,
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.timer = &davinci_timer,
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.init_machine = da850_evm_init,
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MACHINE_END
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