ca4d3e6746
Add missing #inclusions of <linux/irq.h> to a whole bunch of files that should really include it. Note that this can replace #inclusions of <asm/irq.h>. This is required for the patch to sort out irqflags handling function naming to compile on MIPS. The problem is that these files require access to things like setup_irq() - which isn't available by #including <linux/interrupt.h> Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Ralf Baechle <ralf@linux-mips.org>
984 lines
23 KiB
C
984 lines
23 KiB
C
/*
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* Based on linux/arch/mips/txx9/rbtx4938/setup.c,
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* and RBTX49xx patch from CELF patch archive.
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*
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* 2003-2005 (c) MontaVista Software, Inc.
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* (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/string.h>
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#include <linux/module.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/serial_core.h>
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#include <linux/mtd/physmap.h>
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#include <linux/leds.h>
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#include <linux/sysdev.h>
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#include <linux/slab.h>
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#include <linux/irq.h>
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#include <asm/bootinfo.h>
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#include <asm/time.h>
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#include <asm/reboot.h>
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#include <asm/r4kcache.h>
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#include <asm/sections.h>
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#include <asm/txx9/generic.h>
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#include <asm/txx9/pci.h>
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#include <asm/txx9tmr.h>
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#include <asm/txx9/ndfmc.h>
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#include <asm/txx9/dmac.h>
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#ifdef CONFIG_CPU_TX49XX
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#include <asm/txx9/tx4938.h>
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#endif
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/* EBUSC settings of TX4927, etc. */
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struct resource txx9_ce_res[8];
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static char txx9_ce_res_name[8][4]; /* "CEn" */
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/* pcode, internal register */
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unsigned int txx9_pcode;
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char txx9_pcode_str[8];
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static struct resource txx9_reg_res = {
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.name = txx9_pcode_str,
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.flags = IORESOURCE_MEM,
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};
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void __init
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txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
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sprintf(txx9_ce_res_name[i], "CE%d", i);
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txx9_ce_res[i].flags = IORESOURCE_MEM;
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txx9_ce_res[i].name = txx9_ce_res_name[i];
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}
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txx9_pcode = pcode;
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sprintf(txx9_pcode_str, "TX%x", pcode);
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if (base) {
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txx9_reg_res.start = base & 0xfffffffffULL;
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txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
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request_resource(&iomem_resource, &txx9_reg_res);
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}
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}
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/* clocks */
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unsigned int txx9_master_clock;
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unsigned int txx9_cpu_clock;
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unsigned int txx9_gbus_clock;
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#ifdef CONFIG_CPU_TX39XX
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/* don't enable by default - see errata */
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int txx9_ccfg_toeon __initdata;
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#else
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int txx9_ccfg_toeon __initdata = 1;
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#endif
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/* Minimum CLK support */
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struct clk *clk_get(struct device *dev, const char *id)
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{
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if (!strcmp(id, "spi-baseclk"))
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return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 2);
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if (!strcmp(id, "imbus_clk"))
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return (struct clk *)((unsigned long)txx9_gbus_clock / 2);
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return ERR_PTR(-ENOENT);
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}
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EXPORT_SYMBOL(clk_get);
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int clk_enable(struct clk *clk)
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{
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return 0;
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}
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EXPORT_SYMBOL(clk_enable);
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void clk_disable(struct clk *clk)
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{
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}
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EXPORT_SYMBOL(clk_disable);
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unsigned long clk_get_rate(struct clk *clk)
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{
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return (unsigned long)clk;
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}
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EXPORT_SYMBOL(clk_get_rate);
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void clk_put(struct clk *clk)
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{
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}
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EXPORT_SYMBOL(clk_put);
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/* GPIO support */
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#ifdef CONFIG_GENERIC_GPIO
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int gpio_to_irq(unsigned gpio)
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{
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return -EINVAL;
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}
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EXPORT_SYMBOL(gpio_to_irq);
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int irq_to_gpio(unsigned irq)
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{
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return -EINVAL;
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}
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EXPORT_SYMBOL(irq_to_gpio);
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#endif
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#define BOARD_VEC(board) extern struct txx9_board_vec board;
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#include <asm/txx9/boards.h>
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#undef BOARD_VEC
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struct txx9_board_vec *txx9_board_vec __initdata;
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static char txx9_system_type[32];
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static struct txx9_board_vec *board_vecs[] __initdata = {
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#define BOARD_VEC(board) &board,
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#include <asm/txx9/boards.h>
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#undef BOARD_VEC
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};
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static struct txx9_board_vec *__init find_board_byname(const char *name)
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{
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int i;
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/* search board_vecs table */
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for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
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if (strstr(board_vecs[i]->system, name))
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return board_vecs[i];
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}
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return NULL;
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}
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static void __init prom_init_cmdline(void)
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{
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int argc;
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int *argv32;
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int i; /* Always ignore the "-c" at argv[0] */
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if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) {
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/*
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* argc is not a valid number, or argv32 is not a valid
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* pointer
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*/
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argc = 0;
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argv32 = NULL;
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} else {
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argc = (int)fw_arg0;
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argv32 = (int *)fw_arg1;
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}
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arcs_cmdline[0] = '\0';
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for (i = 1; i < argc; i++) {
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char *str = (char *)(long)argv32[i];
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if (i != 1)
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strcat(arcs_cmdline, " ");
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if (strchr(str, ' ')) {
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strcat(arcs_cmdline, "\"");
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strcat(arcs_cmdline, str);
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strcat(arcs_cmdline, "\"");
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} else
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strcat(arcs_cmdline, str);
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}
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}
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static int txx9_ic_disable __initdata;
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static int txx9_dc_disable __initdata;
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#if defined(CONFIG_CPU_TX49XX)
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/* flush all cache on very early stage (before 4k_cache_init) */
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static void __init early_flush_dcache(void)
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{
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unsigned int conf = read_c0_config();
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unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
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unsigned int linesz = 32;
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unsigned long addr, end;
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end = INDEX_BASE + dc_size / 4;
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/* 4way, waybit=0 */
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for (addr = INDEX_BASE; addr < end; addr += linesz) {
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cache_op(Index_Writeback_Inv_D, addr | 0);
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cache_op(Index_Writeback_Inv_D, addr | 1);
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cache_op(Index_Writeback_Inv_D, addr | 2);
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cache_op(Index_Writeback_Inv_D, addr | 3);
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}
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}
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static void __init txx9_cache_fixup(void)
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{
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unsigned int conf;
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conf = read_c0_config();
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/* flush and disable */
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if (txx9_ic_disable) {
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conf |= TX49_CONF_IC;
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write_c0_config(conf);
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}
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if (txx9_dc_disable) {
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early_flush_dcache();
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conf |= TX49_CONF_DC;
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write_c0_config(conf);
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}
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/* enable cache */
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conf = read_c0_config();
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if (!txx9_ic_disable)
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conf &= ~TX49_CONF_IC;
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if (!txx9_dc_disable)
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conf &= ~TX49_CONF_DC;
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write_c0_config(conf);
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if (conf & TX49_CONF_IC)
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pr_info("TX49XX I-Cache disabled.\n");
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if (conf & TX49_CONF_DC)
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pr_info("TX49XX D-Cache disabled.\n");
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}
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#elif defined(CONFIG_CPU_TX39XX)
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/* flush all cache on very early stage (before tx39_cache_init) */
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static void __init early_flush_dcache(void)
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{
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unsigned int conf = read_c0_config();
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unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >>
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TX39_CONF_DCS_SHIFT));
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unsigned int linesz = 16;
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unsigned long addr, end;
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end = INDEX_BASE + dc_size / 2;
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/* 2way, waybit=0 */
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for (addr = INDEX_BASE; addr < end; addr += linesz) {
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cache_op(Index_Writeback_Inv_D, addr | 0);
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cache_op(Index_Writeback_Inv_D, addr | 1);
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}
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}
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static void __init txx9_cache_fixup(void)
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{
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unsigned int conf;
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conf = read_c0_config();
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/* flush and disable */
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if (txx9_ic_disable) {
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conf &= ~TX39_CONF_ICE;
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write_c0_config(conf);
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}
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if (txx9_dc_disable) {
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early_flush_dcache();
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conf &= ~TX39_CONF_DCE;
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write_c0_config(conf);
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}
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/* enable cache */
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conf = read_c0_config();
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if (!txx9_ic_disable)
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conf |= TX39_CONF_ICE;
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if (!txx9_dc_disable)
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conf |= TX39_CONF_DCE;
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write_c0_config(conf);
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if (!(conf & TX39_CONF_ICE))
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pr_info("TX39XX I-Cache disabled.\n");
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if (!(conf & TX39_CONF_DCE))
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pr_info("TX39XX D-Cache disabled.\n");
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}
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#else
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static inline void txx9_cache_fixup(void)
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{
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}
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#endif
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static void __init preprocess_cmdline(void)
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{
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static char cmdline[COMMAND_LINE_SIZE] __initdata;
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char *s;
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strcpy(cmdline, arcs_cmdline);
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s = cmdline;
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arcs_cmdline[0] = '\0';
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while (s && *s) {
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char *str = strsep(&s, " ");
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if (strncmp(str, "board=", 6) == 0) {
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txx9_board_vec = find_board_byname(str + 6);
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continue;
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} else if (strncmp(str, "masterclk=", 10) == 0) {
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unsigned long val;
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if (strict_strtoul(str + 10, 10, &val) == 0)
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txx9_master_clock = val;
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continue;
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} else if (strcmp(str, "icdisable") == 0) {
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txx9_ic_disable = 1;
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continue;
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} else if (strcmp(str, "dcdisable") == 0) {
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txx9_dc_disable = 1;
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continue;
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} else if (strcmp(str, "toeoff") == 0) {
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txx9_ccfg_toeon = 0;
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continue;
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} else if (strcmp(str, "toeon") == 0) {
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txx9_ccfg_toeon = 1;
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continue;
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}
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if (arcs_cmdline[0])
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strcat(arcs_cmdline, " ");
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strcat(arcs_cmdline, str);
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}
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txx9_cache_fixup();
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}
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static void __init select_board(void)
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{
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const char *envstr;
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/* first, determine by "board=" argument in preprocess_cmdline() */
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if (txx9_board_vec)
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return;
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/* next, determine by "board" envvar */
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envstr = prom_getenv("board");
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if (envstr) {
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txx9_board_vec = find_board_byname(envstr);
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if (txx9_board_vec)
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return;
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}
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/* select "default" board */
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#ifdef CONFIG_CPU_TX39XX
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txx9_board_vec = &jmr3927_vec;
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#endif
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#ifdef CONFIG_CPU_TX49XX
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switch (TX4938_REV_PCODE()) {
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#ifdef CONFIG_TOSHIBA_RBTX4927
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case 0x4927:
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txx9_board_vec = &rbtx4927_vec;
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break;
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case 0x4937:
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txx9_board_vec = &rbtx4937_vec;
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break;
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#endif
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#ifdef CONFIG_TOSHIBA_RBTX4938
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case 0x4938:
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txx9_board_vec = &rbtx4938_vec;
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break;
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#endif
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#ifdef CONFIG_TOSHIBA_RBTX4939
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case 0x4939:
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txx9_board_vec = &rbtx4939_vec;
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break;
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#endif
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}
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#endif
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}
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void __init prom_init(void)
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{
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prom_init_cmdline();
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preprocess_cmdline();
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select_board();
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strcpy(txx9_system_type, txx9_board_vec->system);
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txx9_board_vec->prom_init();
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}
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void __init prom_free_prom_memory(void)
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{
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unsigned long saddr = PAGE_SIZE;
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unsigned long eaddr = __pa_symbol(&_text);
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if (saddr < eaddr)
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free_init_pages("prom memory", saddr, eaddr);
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}
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const char *get_system_type(void)
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{
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return txx9_system_type;
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}
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const char *__init prom_getenv(const char *name)
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{
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const s32 *str;
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if (fw_arg2 < CKSEG0)
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return NULL;
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str = (const s32 *)fw_arg2;
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/* YAMON style ("name", "value" pairs) */
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while (str[0] && str[1]) {
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if (!strcmp((const char *)(unsigned long)str[0], name))
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return (const char *)(unsigned long)str[1];
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str += 2;
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}
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return NULL;
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}
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static void __noreturn txx9_machine_halt(void)
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{
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local_irq_disable();
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clear_c0_status(ST0_IM);
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while (1) {
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if (cpu_wait) {
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(*cpu_wait)();
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if (cpu_has_counter) {
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/*
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* Clear counter interrupt while it
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* breaks WAIT instruction even if
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* masked.
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*/
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write_c0_compare(0);
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}
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}
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}
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}
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/* Watchdog support */
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void __init txx9_wdt_init(unsigned long base)
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{
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struct resource res = {
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.start = base,
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.end = base + 0x100 - 1,
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.flags = IORESOURCE_MEM,
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};
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platform_device_register_simple("txx9wdt", -1, &res, 1);
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}
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void txx9_wdt_now(unsigned long base)
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{
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struct txx9_tmr_reg __iomem *tmrptr =
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ioremap(base, sizeof(struct txx9_tmr_reg));
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/* disable watch dog timer */
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__raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
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__raw_writel(0, &tmrptr->tcr);
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/* kick watchdog */
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__raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
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__raw_writel(1, &tmrptr->cpra); /* immediate */
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__raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
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&tmrptr->tcr);
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}
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/* SPI support */
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void __init txx9_spi_init(int busid, unsigned long base, int irq)
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{
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struct resource res[] = {
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{
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.start = base,
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.end = base + 0x20 - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = irq,
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.flags = IORESOURCE_IRQ,
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},
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};
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platform_device_register_simple("spi_txx9", busid,
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res, ARRAY_SIZE(res));
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}
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void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
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{
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struct platform_device *pdev =
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platform_device_alloc("tc35815-mac", id);
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if (!pdev ||
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platform_device_add_data(pdev, ethaddr, 6) ||
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platform_device_add(pdev))
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platform_device_put(pdev);
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}
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void __init txx9_sio_init(unsigned long baseaddr, int irq,
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unsigned int line, unsigned int sclk, int nocts)
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{
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#ifdef CONFIG_SERIAL_TXX9
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struct uart_port req;
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memset(&req, 0, sizeof(req));
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req.line = line;
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req.iotype = UPIO_MEM;
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req.membase = ioremap(baseaddr, 0x24);
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req.mapbase = baseaddr;
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req.irq = irq;
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if (!nocts)
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req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
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if (sclk) {
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req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/;
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req.uartclk = sclk;
|
|
} else
|
|
req.uartclk = TXX9_IMCLK;
|
|
early_serial_txx9_setup(&req);
|
|
#endif /* CONFIG_SERIAL_TXX9 */
|
|
}
|
|
|
|
#ifdef CONFIG_EARLY_PRINTK
|
|
static void __init null_prom_putchar(char c)
|
|
{
|
|
}
|
|
void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar;
|
|
|
|
void __init prom_putchar(char c)
|
|
{
|
|
txx9_prom_putchar(c);
|
|
}
|
|
|
|
static void __iomem *early_txx9_sio_port;
|
|
|
|
static void __init early_txx9_sio_putchar(char c)
|
|
{
|
|
#define TXX9_SICISR 0x0c
|
|
#define TXX9_SITFIFO 0x1c
|
|
#define TXX9_SICISR_TXALS 0x00000002
|
|
while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
|
|
TXX9_SICISR_TXALS))
|
|
;
|
|
__raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
|
|
}
|
|
|
|
void __init txx9_sio_putchar_init(unsigned long baseaddr)
|
|
{
|
|
early_txx9_sio_port = ioremap(baseaddr, 0x24);
|
|
txx9_prom_putchar = early_txx9_sio_putchar;
|
|
}
|
|
#endif /* CONFIG_EARLY_PRINTK */
|
|
|
|
/* wrappers */
|
|
void __init plat_mem_setup(void)
|
|
{
|
|
ioport_resource.start = 0;
|
|
ioport_resource.end = ~0UL; /* no limit */
|
|
iomem_resource.start = 0;
|
|
iomem_resource.end = ~0UL; /* no limit */
|
|
|
|
/* fallback restart/halt routines */
|
|
_machine_restart = (void (*)(char *))txx9_machine_halt;
|
|
_machine_halt = txx9_machine_halt;
|
|
pm_power_off = txx9_machine_halt;
|
|
|
|
#ifdef CONFIG_PCI
|
|
pcibios_plat_setup = txx9_pcibios_setup;
|
|
#endif
|
|
txx9_board_vec->mem_setup();
|
|
}
|
|
|
|
void __init arch_init_irq(void)
|
|
{
|
|
txx9_board_vec->irq_setup();
|
|
}
|
|
|
|
void __init plat_time_init(void)
|
|
{
|
|
#ifdef CONFIG_CPU_TX49XX
|
|
mips_hpt_frequency = txx9_cpu_clock / 2;
|
|
#endif
|
|
txx9_board_vec->time_init();
|
|
}
|
|
|
|
static int __init _txx9_arch_init(void)
|
|
{
|
|
if (txx9_board_vec->arch_init)
|
|
txx9_board_vec->arch_init();
|
|
return 0;
|
|
}
|
|
arch_initcall(_txx9_arch_init);
|
|
|
|
static int __init _txx9_device_init(void)
|
|
{
|
|
if (txx9_board_vec->device_init)
|
|
txx9_board_vec->device_init();
|
|
return 0;
|
|
}
|
|
device_initcall(_txx9_device_init);
|
|
|
|
int (*txx9_irq_dispatch)(int pending);
|
|
asmlinkage void plat_irq_dispatch(void)
|
|
{
|
|
int pending = read_c0_status() & read_c0_cause() & ST0_IM;
|
|
int irq = txx9_irq_dispatch(pending);
|
|
|
|
if (likely(irq >= 0))
|
|
do_IRQ(irq);
|
|
else
|
|
spurious_interrupt();
|
|
}
|
|
|
|
/* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
|
|
#ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
|
|
static unsigned long __swizzle_addr_none(unsigned long port)
|
|
{
|
|
return port;
|
|
}
|
|
unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
|
|
EXPORT_SYMBOL(__swizzle_addr_b);
|
|
#endif
|
|
|
|
#ifdef NEEDS_TXX9_IOSWABW
|
|
static u16 ioswabw_default(volatile u16 *a, u16 x)
|
|
{
|
|
return le16_to_cpu(x);
|
|
}
|
|
static u16 __mem_ioswabw_default(volatile u16 *a, u16 x)
|
|
{
|
|
return x;
|
|
}
|
|
u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default;
|
|
EXPORT_SYMBOL(ioswabw);
|
|
u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default;
|
|
EXPORT_SYMBOL(__mem_ioswabw);
|
|
#endif
|
|
|
|
void __init txx9_physmap_flash_init(int no, unsigned long addr,
|
|
unsigned long size,
|
|
const struct physmap_flash_data *pdata)
|
|
{
|
|
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
|
|
struct resource res = {
|
|
.start = addr,
|
|
.end = addr + size - 1,
|
|
.flags = IORESOURCE_MEM,
|
|
};
|
|
struct platform_device *pdev;
|
|
#ifdef CONFIG_MTD_PARTITIONS
|
|
static struct mtd_partition parts[2];
|
|
struct physmap_flash_data pdata_part;
|
|
|
|
/* If this area contained boot area, make separate partition */
|
|
if (pdata->nr_parts == 0 && !pdata->parts &&
|
|
addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
|
|
!parts[0].name) {
|
|
parts[0].name = "boot";
|
|
parts[0].offset = 0x1fc00000 - addr;
|
|
parts[0].size = addr + size - 0x1fc00000;
|
|
parts[1].name = "user";
|
|
parts[1].offset = 0;
|
|
parts[1].size = 0x1fc00000 - addr;
|
|
pdata_part = *pdata;
|
|
pdata_part.nr_parts = ARRAY_SIZE(parts);
|
|
pdata_part.parts = parts;
|
|
pdata = &pdata_part;
|
|
}
|
|
#endif
|
|
pdev = platform_device_alloc("physmap-flash", no);
|
|
if (!pdev ||
|
|
platform_device_add_resources(pdev, &res, 1) ||
|
|
platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
|
|
platform_device_add(pdev))
|
|
platform_device_put(pdev);
|
|
#endif
|
|
}
|
|
|
|
void __init txx9_ndfmc_init(unsigned long baseaddr,
|
|
const struct txx9ndfmc_platform_data *pdata)
|
|
{
|
|
#if defined(CONFIG_MTD_NAND_TXX9NDFMC) || \
|
|
defined(CONFIG_MTD_NAND_TXX9NDFMC_MODULE)
|
|
struct resource res = {
|
|
.start = baseaddr,
|
|
.end = baseaddr + 0x1000 - 1,
|
|
.flags = IORESOURCE_MEM,
|
|
};
|
|
struct platform_device *pdev = platform_device_alloc("txx9ndfmc", -1);
|
|
|
|
if (!pdev ||
|
|
platform_device_add_resources(pdev, &res, 1) ||
|
|
platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
|
|
platform_device_add(pdev))
|
|
platform_device_put(pdev);
|
|
#endif
|
|
}
|
|
|
|
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
|
|
static DEFINE_SPINLOCK(txx9_iocled_lock);
|
|
|
|
#define TXX9_IOCLED_MAXLEDS 8
|
|
|
|
struct txx9_iocled_data {
|
|
struct gpio_chip chip;
|
|
u8 cur_val;
|
|
void __iomem *mmioaddr;
|
|
struct gpio_led_platform_data pdata;
|
|
struct gpio_led leds[TXX9_IOCLED_MAXLEDS];
|
|
char names[TXX9_IOCLED_MAXLEDS][32];
|
|
};
|
|
|
|
static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
|
|
{
|
|
struct txx9_iocled_data *data =
|
|
container_of(chip, struct txx9_iocled_data, chip);
|
|
return data->cur_val & (1 << offset);
|
|
}
|
|
|
|
static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
|
|
int value)
|
|
{
|
|
struct txx9_iocled_data *data =
|
|
container_of(chip, struct txx9_iocled_data, chip);
|
|
unsigned long flags;
|
|
spin_lock_irqsave(&txx9_iocled_lock, flags);
|
|
if (value)
|
|
data->cur_val |= 1 << offset;
|
|
else
|
|
data->cur_val &= ~(1 << offset);
|
|
writeb(data->cur_val, data->mmioaddr);
|
|
mmiowb();
|
|
spin_unlock_irqrestore(&txx9_iocled_lock, flags);
|
|
}
|
|
|
|
static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset,
|
|
int value)
|
|
{
|
|
txx9_iocled_set(chip, offset, value);
|
|
return 0;
|
|
}
|
|
|
|
void __init txx9_iocled_init(unsigned long baseaddr,
|
|
int basenum, unsigned int num, int lowactive,
|
|
const char *color, char **deftriggers)
|
|
{
|
|
struct txx9_iocled_data *iocled;
|
|
struct platform_device *pdev;
|
|
int i;
|
|
static char *default_triggers[] __initdata = {
|
|
"heartbeat",
|
|
"ide-disk",
|
|
"nand-disk",
|
|
NULL,
|
|
};
|
|
|
|
if (!deftriggers)
|
|
deftriggers = default_triggers;
|
|
iocled = kzalloc(sizeof(*iocled), GFP_KERNEL);
|
|
if (!iocled)
|
|
return;
|
|
iocled->mmioaddr = ioremap(baseaddr, 1);
|
|
if (!iocled->mmioaddr)
|
|
goto out_free;
|
|
iocled->chip.get = txx9_iocled_get;
|
|
iocled->chip.set = txx9_iocled_set;
|
|
iocled->chip.direction_input = txx9_iocled_dir_in;
|
|
iocled->chip.direction_output = txx9_iocled_dir_out;
|
|
iocled->chip.label = "iocled";
|
|
iocled->chip.base = basenum;
|
|
iocled->chip.ngpio = num;
|
|
if (gpiochip_add(&iocled->chip))
|
|
goto out_unmap;
|
|
if (basenum < 0)
|
|
basenum = iocled->chip.base;
|
|
|
|
pdev = platform_device_alloc("leds-gpio", basenum);
|
|
if (!pdev)
|
|
goto out_gpio;
|
|
iocled->pdata.num_leds = num;
|
|
iocled->pdata.leds = iocled->leds;
|
|
for (i = 0; i < num; i++) {
|
|
struct gpio_led *led = &iocled->leds[i];
|
|
snprintf(iocled->names[i], sizeof(iocled->names[i]),
|
|
"iocled:%s:%u", color, i);
|
|
led->name = iocled->names[i];
|
|
led->gpio = basenum + i;
|
|
led->active_low = lowactive;
|
|
if (deftriggers && *deftriggers)
|
|
led->default_trigger = *deftriggers++;
|
|
}
|
|
pdev->dev.platform_data = &iocled->pdata;
|
|
if (platform_device_add(pdev))
|
|
goto out_pdev;
|
|
return;
|
|
out_pdev:
|
|
platform_device_put(pdev);
|
|
out_gpio:
|
|
if (gpiochip_remove(&iocled->chip))
|
|
return;
|
|
out_unmap:
|
|
iounmap(iocled->mmioaddr);
|
|
out_free:
|
|
kfree(iocled);
|
|
}
|
|
#else /* CONFIG_LEDS_GPIO */
|
|
void __init txx9_iocled_init(unsigned long baseaddr,
|
|
int basenum, unsigned int num, int lowactive,
|
|
const char *color, char **deftriggers)
|
|
{
|
|
}
|
|
#endif /* CONFIG_LEDS_GPIO */
|
|
|
|
void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq,
|
|
const struct txx9dmac_platform_data *pdata)
|
|
{
|
|
#if defined(CONFIG_TXX9_DMAC) || defined(CONFIG_TXX9_DMAC_MODULE)
|
|
struct resource res[] = {
|
|
{
|
|
.start = baseaddr,
|
|
.end = baseaddr + 0x800 - 1,
|
|
.flags = IORESOURCE_MEM,
|
|
#ifndef CONFIG_MACH_TX49XX
|
|
}, {
|
|
.start = irq,
|
|
.flags = IORESOURCE_IRQ,
|
|
#endif
|
|
}
|
|
};
|
|
#ifdef CONFIG_MACH_TX49XX
|
|
struct resource chan_res[] = {
|
|
{
|
|
.flags = IORESOURCE_IRQ,
|
|
}
|
|
};
|
|
#endif
|
|
struct platform_device *pdev = platform_device_alloc("txx9dmac", id);
|
|
struct txx9dmac_chan_platform_data cpdata;
|
|
int i;
|
|
|
|
if (!pdev ||
|
|
platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
|
|
platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
|
|
platform_device_add(pdev)) {
|
|
platform_device_put(pdev);
|
|
return;
|
|
}
|
|
memset(&cpdata, 0, sizeof(cpdata));
|
|
cpdata.dmac_dev = pdev;
|
|
for (i = 0; i < TXX9_DMA_MAX_NR_CHANNELS; i++) {
|
|
#ifdef CONFIG_MACH_TX49XX
|
|
chan_res[0].start = irq + i;
|
|
#endif
|
|
pdev = platform_device_alloc("txx9dmac-chan",
|
|
id * TXX9_DMA_MAX_NR_CHANNELS + i);
|
|
if (!pdev ||
|
|
#ifdef CONFIG_MACH_TX49XX
|
|
platform_device_add_resources(pdev, chan_res,
|
|
ARRAY_SIZE(chan_res)) ||
|
|
#endif
|
|
platform_device_add_data(pdev, &cpdata, sizeof(cpdata)) ||
|
|
platform_device_add(pdev))
|
|
platform_device_put(pdev);
|
|
}
|
|
#endif
|
|
}
|
|
|
|
void __init txx9_aclc_init(unsigned long baseaddr, int irq,
|
|
unsigned int dmac_id,
|
|
unsigned int dma_chan_out,
|
|
unsigned int dma_chan_in)
|
|
{
|
|
#if defined(CONFIG_SND_SOC_TXX9ACLC) || \
|
|
defined(CONFIG_SND_SOC_TXX9ACLC_MODULE)
|
|
unsigned int dma_base = dmac_id * TXX9_DMA_MAX_NR_CHANNELS;
|
|
struct resource res[] = {
|
|
{
|
|
.start = baseaddr,
|
|
.end = baseaddr + 0x100 - 1,
|
|
.flags = IORESOURCE_MEM,
|
|
}, {
|
|
.start = irq,
|
|
.flags = IORESOURCE_IRQ,
|
|
}, {
|
|
.name = "txx9dmac-chan",
|
|
.start = dma_base + dma_chan_out,
|
|
.flags = IORESOURCE_DMA,
|
|
}, {
|
|
.name = "txx9dmac-chan",
|
|
.start = dma_base + dma_chan_in,
|
|
.flags = IORESOURCE_DMA,
|
|
}
|
|
};
|
|
struct platform_device *pdev =
|
|
platform_device_alloc("txx9aclc-ac97", -1);
|
|
|
|
if (!pdev ||
|
|
platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
|
|
platform_device_add(pdev))
|
|
platform_device_put(pdev);
|
|
#endif
|
|
}
|
|
|
|
static struct sysdev_class txx9_sramc_sysdev_class;
|
|
|
|
struct txx9_sramc_sysdev {
|
|
struct sys_device dev;
|
|
struct bin_attribute bindata_attr;
|
|
void __iomem *base;
|
|
};
|
|
|
|
static ssize_t txx9_sram_read(struct file *filp, struct kobject *kobj,
|
|
struct bin_attribute *bin_attr,
|
|
char *buf, loff_t pos, size_t size)
|
|
{
|
|
struct txx9_sramc_sysdev *dev = bin_attr->private;
|
|
size_t ramsize = bin_attr->size;
|
|
|
|
if (pos >= ramsize)
|
|
return 0;
|
|
if (pos + size > ramsize)
|
|
size = ramsize - pos;
|
|
memcpy_fromio(buf, dev->base + pos, size);
|
|
return size;
|
|
}
|
|
|
|
static ssize_t txx9_sram_write(struct file *filp, struct kobject *kobj,
|
|
struct bin_attribute *bin_attr,
|
|
char *buf, loff_t pos, size_t size)
|
|
{
|
|
struct txx9_sramc_sysdev *dev = bin_attr->private;
|
|
size_t ramsize = bin_attr->size;
|
|
|
|
if (pos >= ramsize)
|
|
return 0;
|
|
if (pos + size > ramsize)
|
|
size = ramsize - pos;
|
|
memcpy_toio(dev->base + pos, buf, size);
|
|
return size;
|
|
}
|
|
|
|
void __init txx9_sramc_init(struct resource *r)
|
|
{
|
|
struct txx9_sramc_sysdev *dev;
|
|
size_t size;
|
|
int err;
|
|
|
|
if (!txx9_sramc_sysdev_class.name) {
|
|
txx9_sramc_sysdev_class.name = "txx9_sram";
|
|
err = sysdev_class_register(&txx9_sramc_sysdev_class);
|
|
if (err) {
|
|
txx9_sramc_sysdev_class.name = NULL;
|
|
return;
|
|
}
|
|
}
|
|
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
|
|
if (!dev)
|
|
return;
|
|
size = resource_size(r);
|
|
dev->base = ioremap(r->start, size);
|
|
if (!dev->base)
|
|
goto exit;
|
|
dev->dev.cls = &txx9_sramc_sysdev_class;
|
|
sysfs_bin_attr_init(&dev->bindata_attr);
|
|
dev->bindata_attr.attr.name = "bindata";
|
|
dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR;
|
|
dev->bindata_attr.read = txx9_sram_read;
|
|
dev->bindata_attr.write = txx9_sram_write;
|
|
dev->bindata_attr.size = size;
|
|
dev->bindata_attr.private = dev;
|
|
err = sysdev_register(&dev->dev);
|
|
if (err)
|
|
goto exit;
|
|
err = sysfs_create_bin_file(&dev->dev.kobj, &dev->bindata_attr);
|
|
if (err) {
|
|
sysdev_unregister(&dev->dev);
|
|
goto exit;
|
|
}
|
|
return;
|
|
exit:
|
|
if (dev) {
|
|
if (dev->base)
|
|
iounmap(dev->base);
|
|
kfree(dev);
|
|
}
|
|
}
|