585cf17561
The Marvell Orion is a family of ARM SoCs with a DDR/DDR2 memory controller, 10/100/1000 ethernet MAC, and USB 2.0 interfaces, and, depending on the specific model, PCI-E interface, PCI-X interface, SATA controllers, crypto unit, SPI interface, SDIO interface, device bus, NAND controller, DMA engine and/or XOR engine. This contains the basic structure and architecture register definitions. Signed-off-by: Tzachi Perelstein <tzachi@marvell.com> Reviewed-by: Nicolas Pitre <nico@marvell.com> Reviewed-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
32 lines
627 B
C
32 lines
627 B
C
/*
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* include/asm-arm/arch-orion/system.h
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*
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* Tzachi Perelstein <tzachi@marvell.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __ASM_ARCH_SYSTEM_H
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#define __ASM_ARCH_SYSTEM_H
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#include <asm/arch/hardware.h>
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#include <asm/arch/orion.h>
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static inline void arch_idle(void)
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{
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cpu_do_idle();
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}
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static inline void arch_reset(char mode)
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{
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/*
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* Enable and issue soft reset
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*/
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orion_setbits(CPU_RESET_MASK, (1 << 2));
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orion_setbits(CPU_SOFT_RESET, 1);
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}
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#endif
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