9d325f2341
The S3C64XX timer is running at the wrong rate due to the assumptions made in the timer initialisation about the way the pwm dividers work. This means that time on the S3C64XX runs twice as fast as it should. Fix the problem by moving to using the clk framework to setup the pwm timer clock muxes, as the pwm-clock code has all the necessary knowledge of how the timer clock inputs are routed. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
89 lines
2.3 KiB
C
89 lines
2.3 KiB
C
/* linux/arch/arm/plat-s3c/include/plat/clock.h
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*
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* Copyright (c) 2004-2005 Simtec Electronics
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* http://www.simtec.co.uk/products/SWLINUX/
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* Written by Ben Dooks, <ben@simtec.co.uk>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/spinlock.h>
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struct clk {
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struct list_head list;
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struct module *owner;
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struct clk *parent;
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const char *name;
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int id;
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int usage;
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unsigned long rate;
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unsigned long ctrlbit;
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int (*enable)(struct clk *, int enable);
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int (*set_rate)(struct clk *c, unsigned long rate);
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unsigned long (*get_rate)(struct clk *c);
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unsigned long (*round_rate)(struct clk *c, unsigned long rate);
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int (*set_parent)(struct clk *c, struct clk *parent);
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};
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/* other clocks which may be registered by board support */
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extern struct clk s3c24xx_dclk0;
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extern struct clk s3c24xx_dclk1;
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extern struct clk s3c24xx_clkout0;
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extern struct clk s3c24xx_clkout1;
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extern struct clk s3c24xx_uclk;
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extern struct clk clk_usb_bus;
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/* core clock support */
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extern struct clk clk_f;
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extern struct clk clk_h;
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extern struct clk clk_p;
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extern struct clk clk_mpll;
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extern struct clk clk_upll;
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extern struct clk clk_epll;
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extern struct clk clk_xtal;
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extern struct clk clk_ext;
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/* S3C64XX specific clocks */
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extern struct clk clk_27m;
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extern struct clk clk_48m;
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/* exports for arch/arm/mach-s3c2410
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*
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* Please DO NOT use these outside of arch/arm/mach-s3c2410
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*/
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extern spinlock_t clocks_lock;
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extern int s3c2410_clkcon_enable(struct clk *clk, int enable);
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extern int s3c24xx_register_clock(struct clk *clk);
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extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks);
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extern int s3c24xx_register_baseclocks(unsigned long xtal);
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extern void s3c64xx_register_clocks(void);
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extern void s3c24xx_setup_clocks(unsigned long fclk,
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unsigned long hclk,
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unsigned long pclk);
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extern void s3c2410_setup_clocks(void);
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extern void s3c2412_setup_clocks(void);
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extern void s3c244x_setup_clocks(void);
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extern void s3c2443_setup_clocks(void);
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/* S3C64XX specific functions and clocks */
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extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable);
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/* Init for pwm clock code */
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extern void s3c_pwmclk_init(void);
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