cfca8b539f
Adds MX1 architecture to platform MXC. It will supersede mach-imx and let it die. Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt> Signed-off-by: Darius Augulis <augulis.darius@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
46 lines
1020 B
Plaintext
46 lines
1020 B
Plaintext
if ARCH_MXC
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menu "Freescale MXC Implementations"
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choice
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prompt "MXC/iMX Base Type"
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default ARCH_MX3
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config ARCH_MX1
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bool "MX1-based"
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help
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This enables support for systems based on the Freescale i.MX1 family
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config ARCH_MX2
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bool "MX2-based"
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select CPU_ARM926T
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help
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This enables support for systems based on the Freescale i.MX2 family
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config ARCH_MX3
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bool "MX3-based"
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select CPU_V6
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help
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This enables support for systems based on the Freescale i.MX3 family
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endchoice
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source "arch/arm/mach-mx1/Kconfig"
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source "arch/arm/mach-mx2/Kconfig"
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source "arch/arm/mach-mx3/Kconfig"
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endmenu
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config MXC_IRQ_PRIOR
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bool "Use IRQ priority"
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depends on ARCH_MXC
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help
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Select this if you want to use prioritized IRQ handling.
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This feature prevents higher priority ISR to be interrupted
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by lower priority IRQ even IRQF_DISABLED flag is not set.
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This may be useful in embedded applications, where are strong
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requirements for timing.
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Say N here, unless you have a specialized requirement.
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endif
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