cddb483a74
This patch adds support for flashes on IGEP v2 boards. For now only OneNAND is supported. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
459 lines
11 KiB
C
459 lines
11 KiB
C
/*
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* Copyright (C) 2009 Integration Software and Electronic Engineering.
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*
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* Modified from mach-omap2/board-generic.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <linux/interrupt.h>
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#include <linux/regulator/machine.h>
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#include <linux/i2c/twl.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <plat/board.h>
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#include <plat/common.h>
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#include <plat/gpmc.h>
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#include <plat/usb.h>
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#include <plat/display.h>
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#include <plat/onenand.h>
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#include "mux.h"
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#include "hsmmc.h"
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#define IGEP2_SMSC911X_CS 5
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#define IGEP2_SMSC911X_GPIO 176
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#define IGEP2_GPIO_USBH_NRESET 24
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#define IGEP2_GPIO_LED0_RED 26
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#define IGEP2_GPIO_LED0_GREEN 27
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#define IGEP2_GPIO_LED1_RED 28
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#define IGEP2_GPIO_DVI_PUP 170
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#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
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defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
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#define ONENAND_MAP 0x20000000
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/* NAND04GR4E1A ( x2 Flash built-in COMBO POP MEMORY )
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* Since the device is equipped with two DataRAMs, and two-plane NAND
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* Flash memory array, these two component enables simultaneous program
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* of 4KiB. Plane1 has only even blocks such as block0, block2, block4
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* while Plane2 has only odd blocks such as block1, block3, block5.
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* So MTD regards it as 4KiB page size and 256KiB block size 64*(2*2048)
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*/
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static struct mtd_partition igep2_onenand_partitions[] = {
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{
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.name = "X-Loader",
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.offset = 0,
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.size = 2 * (64*(2*2048))
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},
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{
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.name = "U-Boot",
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.offset = MTDPART_OFS_APPEND,
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.size = 6 * (64*(2*2048)),
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},
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{
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.name = "Environment",
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.offset = MTDPART_OFS_APPEND,
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.size = 2 * (64*(2*2048)),
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},
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{
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.name = "Kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = 12 * (64*(2*2048)),
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},
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{
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.name = "File System",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static int igep2_onenand_setup(void __iomem *onenand_base, int freq)
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{
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/* nothing is required to be setup for onenand as of now */
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return 0;
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}
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static struct omap_onenand_platform_data igep2_onenand_data = {
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.parts = igep2_onenand_partitions,
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.nr_parts = ARRAY_SIZE(igep2_onenand_partitions),
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.onenand_setup = igep2_onenand_setup,
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.dma_channel = -1, /* disable DMA in OMAP OneNAND driver */
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};
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static struct platform_device igep2_onenand_device = {
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.name = "omap2-onenand",
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.id = -1,
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.dev = {
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.platform_data = &igep2_onenand_data,
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},
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};
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void __init igep2_flash_init(void)
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{
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u8 cs = 0;
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u8 onenandcs = GPMC_CS_NUM + 1;
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while (cs < GPMC_CS_NUM) {
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u32 ret = 0;
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ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
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/* Check if NAND/oneNAND is configured */
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if ((ret & 0xC00) == 0x800)
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/* NAND found */
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pr_err("IGEP v2: Unsupported NAND found\n");
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else {
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ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
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if ((ret & 0x3F) == (ONENAND_MAP >> 24))
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/* ONENAND found */
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onenandcs = cs;
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}
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cs++;
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}
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if (onenandcs > GPMC_CS_NUM) {
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pr_err("IGEP v2: Unable to find configuration in GPMC\n");
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return;
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}
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if (onenandcs < GPMC_CS_NUM) {
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igep2_onenand_data.cs = onenandcs;
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if (platform_device_register(&igep2_onenand_device) < 0)
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pr_err("IGEP v2: Unable to register OneNAND device\n");
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}
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}
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#else
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void __init igep2_flash_init(void) {}
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#endif
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#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
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#include <linux/smsc911x.h>
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static struct smsc911x_platform_config igep2_smsc911x_config = {
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.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
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.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
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.flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS ,
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.phy_interface = PHY_INTERFACE_MODE_MII,
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};
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static struct resource igep2_smsc911x_resources[] = {
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{
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.flags = IORESOURCE_MEM,
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},
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{
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.start = OMAP_GPIO_IRQ(IGEP2_SMSC911X_GPIO),
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.end = OMAP_GPIO_IRQ(IGEP2_SMSC911X_GPIO),
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
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},
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};
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static struct platform_device igep2_smsc911x_device = {
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.name = "smsc911x",
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.id = 0,
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.num_resources = ARRAY_SIZE(igep2_smsc911x_resources),
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.resource = igep2_smsc911x_resources,
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.dev = {
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.platform_data = &igep2_smsc911x_config,
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},
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};
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static inline void __init igep2_init_smsc911x(void)
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{
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unsigned long cs_mem_base;
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if (gpmc_cs_request(IGEP2_SMSC911X_CS, SZ_16M, &cs_mem_base) < 0) {
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pr_err("IGEP v2: Failed request for GPMC mem for smsc911x\n");
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gpmc_cs_free(IGEP2_SMSC911X_CS);
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return;
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}
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igep2_smsc911x_resources[0].start = cs_mem_base + 0x0;
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igep2_smsc911x_resources[0].end = cs_mem_base + 0xff;
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if ((gpio_request(IGEP2_SMSC911X_GPIO, "SMSC911X IRQ") == 0) &&
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(gpio_direction_input(IGEP2_SMSC911X_GPIO) == 0)) {
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gpio_export(IGEP2_SMSC911X_GPIO, 0);
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} else {
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pr_err("IGEP v2: Could not obtain gpio for for SMSC911X IRQ\n");
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return;
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}
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platform_device_register(&igep2_smsc911x_device);
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}
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#else
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static inline void __init igep2_init_smsc911x(void) { }
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#endif
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static struct omap_board_config_kernel igep2_config[] __initdata = {
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};
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static struct regulator_consumer_supply igep2_vmmc1_supply = {
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.supply = "vmmc",
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};
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/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
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static struct regulator_init_data igep2_vmmc1 = {
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.constraints = {
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.min_uV = 1850000,
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.max_uV = 3150000,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
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| REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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.num_consumer_supplies = 1,
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.consumer_supplies = &igep2_vmmc1_supply,
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};
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static struct omap2_hsmmc_info mmc[] = {
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{
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.mmc = 1,
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.wires = 4,
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.gpio_cd = -EINVAL,
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.gpio_wp = -EINVAL,
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},
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{
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.mmc = 2,
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.wires = 4,
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.gpio_cd = -EINVAL,
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.gpio_wp = -EINVAL,
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},
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{} /* Terminator */
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};
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static int igep2_twl_gpio_setup(struct device *dev,
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unsigned gpio, unsigned ngpio)
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{
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/* gpio + 0 is "mmc0_cd" (input/IRQ) */
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mmc[0].gpio_cd = gpio + 0;
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omap2_hsmmc_init(mmc);
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/* link regulators to MMC adapters ... we "know" the
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* regulators will be set up only *after* we return.
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*/
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igep2_vmmc1_supply.dev = mmc[0].dev;
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return 0;
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};
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static struct twl4030_gpio_platform_data igep2_gpio_data = {
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.gpio_base = OMAP_MAX_GPIO_LINES,
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.irq_base = TWL4030_GPIO_IRQ_BASE,
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.irq_end = TWL4030_GPIO_IRQ_END,
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.use_leds = false,
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.setup = igep2_twl_gpio_setup,
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};
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static struct twl4030_usb_data igep2_usb_data = {
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.usb_mode = T2_USB_MODE_ULPI,
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};
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static int igep2_enable_dvi(struct omap_dss_device *dssdev)
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{
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gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1);
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return 0;
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}
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static void igep2_disable_dvi(struct omap_dss_device *dssdev)
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{
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gpio_direction_output(IGEP2_GPIO_DVI_PUP, 0);
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}
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static struct omap_dss_device igep2_dvi_device = {
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.type = OMAP_DISPLAY_TYPE_DPI,
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.name = "dvi",
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.driver_name = "generic_panel",
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.phy.dpi.data_lines = 24,
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.platform_enable = igep2_enable_dvi,
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.platform_disable = igep2_disable_dvi,
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};
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static struct omap_dss_device *igep2_dss_devices[] = {
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&igep2_dvi_device
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};
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static struct omap_dss_board_info igep2_dss_data = {
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.num_devices = ARRAY_SIZE(igep2_dss_devices),
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.devices = igep2_dss_devices,
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.default_device = &igep2_dvi_device,
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};
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static struct platform_device igep2_dss_device = {
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.name = "omapdss",
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.id = -1,
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.dev = {
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.platform_data = &igep2_dss_data,
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},
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};
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static struct regulator_consumer_supply igep2_vpll2_supply = {
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.supply = "vdds_dsi",
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.dev = &igep2_dss_device.dev,
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};
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static struct regulator_init_data igep2_vpll2 = {
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.constraints = {
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.name = "VDVI",
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.min_uV = 1800000,
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.max_uV = 1800000,
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.apply_uV = true,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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.num_consumer_supplies = 1,
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.consumer_supplies = &igep2_vpll2_supply,
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};
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static void __init igep2_display_init(void)
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{
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if (gpio_request(IGEP2_GPIO_DVI_PUP, "GPIO_DVI_PUP") &&
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gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1))
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pr_err("IGEP v2: Could not obtain gpio GPIO_DVI_PUP\n");
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}
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static struct platform_device *igep2_devices[] __initdata = {
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&igep2_dss_device,
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};
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static void __init igep2_init_irq(void)
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{
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omap_board_config = igep2_config;
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omap_board_config_size = ARRAY_SIZE(igep2_config);
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omap2_init_common_hw(NULL, NULL);
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omap_init_irq();
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omap_gpio_init();
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}
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static struct twl4030_codec_audio_data igep2_audio_data = {
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.audio_mclk = 26000000,
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};
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static struct twl4030_codec_data igep2_codec_data = {
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.audio_mclk = 26000000,
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.audio = &igep2_audio_data,
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};
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static struct twl4030_platform_data igep2_twldata = {
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.irq_base = TWL4030_IRQ_BASE,
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.irq_end = TWL4030_IRQ_END,
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/* platform_data for children goes here */
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.usb = &igep2_usb_data,
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.codec = &igep2_codec_data,
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.gpio = &igep2_gpio_data,
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.vmmc1 = &igep2_vmmc1,
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.vpll2 = &igep2_vpll2,
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};
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static struct i2c_board_info __initdata igep2_i2c_boardinfo[] = {
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{
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I2C_BOARD_INFO("twl4030", 0x48),
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.flags = I2C_CLIENT_WAKE,
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.irq = INT_34XX_SYS_NIRQ,
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.platform_data = &igep2_twldata,
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},
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};
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static int __init igep2_i2c_init(void)
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{
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omap_register_i2c_bus(1, 2600, igep2_i2c_boardinfo,
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ARRAY_SIZE(igep2_i2c_boardinfo));
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/* Bus 3 is attached to the DVI port where devices like the pico DLP
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* projector don't work reliably with 400kHz */
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omap_register_i2c_bus(3, 100, NULL, 0);
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return 0;
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}
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static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
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.port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
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.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
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.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
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.phy_reset = true,
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.reset_gpio_port[0] = -EINVAL,
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.reset_gpio_port[1] = IGEP2_GPIO_USBH_NRESET,
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.reset_gpio_port[2] = -EINVAL,
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};
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#ifdef CONFIG_OMAP_MUX
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static struct omap_board_mux board_mux[] __initdata = {
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{ .reg_offset = OMAP_MUX_TERMINATOR },
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};
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#else
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#define board_mux NULL
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#endif
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static void __init igep2_init(void)
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{
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omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
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igep2_i2c_init();
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platform_add_devices(igep2_devices, ARRAY_SIZE(igep2_devices));
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omap_serial_init();
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usb_musb_init();
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usb_ehci_init(&ehci_pdata);
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igep2_flash_init();
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igep2_display_init();
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igep2_init_smsc911x();
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/* GPIO userspace leds */
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if ((gpio_request(IGEP2_GPIO_LED0_RED, "GPIO_LED0_RED") == 0) &&
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(gpio_direction_output(IGEP2_GPIO_LED0_RED, 1) == 0)) {
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gpio_export(IGEP2_GPIO_LED0_RED, 0);
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gpio_set_value(IGEP2_GPIO_LED0_RED, 0);
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} else
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pr_warning("IGEP v2: Could not obtain gpio GPIO_LED0_RED\n");
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if ((gpio_request(IGEP2_GPIO_LED0_GREEN, "GPIO_LED0_GREEN") == 0) &&
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(gpio_direction_output(IGEP2_GPIO_LED0_GREEN, 1) == 0)) {
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gpio_export(IGEP2_GPIO_LED0_GREEN, 0);
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gpio_set_value(IGEP2_GPIO_LED0_GREEN, 0);
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} else
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pr_warning("IGEP v2: Could not obtain gpio GPIO_LED0_GREEN\n");
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if ((gpio_request(IGEP2_GPIO_LED1_RED, "GPIO_LED1_RED") == 0) &&
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(gpio_direction_output(IGEP2_GPIO_LED1_RED, 1) == 0)) {
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gpio_export(IGEP2_GPIO_LED1_RED, 0);
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gpio_set_value(IGEP2_GPIO_LED1_RED, 0);
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} else
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pr_warning("IGEP v2: Could not obtain gpio GPIO_LED1_RED\n");
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}
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static void __init igep2_map_io(void)
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{
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omap2_set_globals_343x();
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omap34xx_map_common_io();
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}
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MACHINE_START(IGEP0020, "IGEP v2 board")
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.phys_io = 0x48000000,
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.io_pg_offst = ((0xfa000000) >> 18) & 0xfffc,
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.boot_params = 0x80000100,
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.map_io = igep2_map_io,
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.init_irq = igep2_init_irq,
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.init_machine = igep2_init,
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.timer = &omap_timer,
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MACHINE_END
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