e99ce78030
The RTD SoCs share a similar design for pinmux and pinconfig. This common pinctrl driver supports different variants within the RTD SoCs. Signed-off-by: Tzuyi Chang <tychang@realtek.com> Link: https://lore.kernel.org/r/20230919101117.4097-2-tychang@realtek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
125 lines
2.8 KiB
C
125 lines
2.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (c) 2023 Realtek Semiconductor Corp.
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*/
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#define NA 0xffffffff
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#define PADDRI_4_8 1
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#define PADDRI_2_4 0
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struct rtd_pin_group_desc {
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const char *name;
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const unsigned int *pins;
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unsigned int num_pins;
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};
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struct rtd_pin_func_desc {
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const char *name;
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const char * const *groups;
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unsigned int num_groups;
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};
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struct rtd_pin_mux_desc {
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const char *name;
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u32 mux_value;
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};
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struct rtd_pin_config_desc {
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const char *name;
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unsigned int reg_offset;
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unsigned int base_bit;
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unsigned int pud_en_offset;
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unsigned int pud_sel_offset;
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unsigned int curr_offset;
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unsigned int smt_offset;
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unsigned int power_offset;
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unsigned int curr_type;
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};
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struct rtd_pin_sconfig_desc {
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const char *name;
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unsigned int reg_offset;
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unsigned int dcycle_offset;
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unsigned int dcycle_maskbits;
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unsigned int ndrive_offset;
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unsigned int ndrive_maskbits;
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unsigned int pdrive_offset;
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unsigned int pdrive_maskbits;
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};
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struct rtd_pin_desc {
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const char *name;
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unsigned int mux_offset;
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u32 mux_mask;
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const struct rtd_pin_mux_desc *functions;
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};
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struct rtd_pin_reg_list {
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unsigned int reg_offset;
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unsigned int val;
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};
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#define SHIFT_LEFT(_val, _shift) ((_val) << (_shift))
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#define RTK_PIN_MUX(_name, _mux_off, _mux_mask, ...) \
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{ \
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.name = # _name, \
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.mux_offset = _mux_off, \
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.mux_mask = _mux_mask, \
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.functions = (const struct rtd_pin_mux_desc []) { \
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__VA_ARGS__, { } \
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}, \
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}
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#define RTK_PIN_CONFIG(_name, _reg_off, _base_bit, _pud_en_off, \
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_pud_sel_off, _curr_off, _smt_off, _pow_off, _curr_type) \
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{ \
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.name = # _name, \
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.reg_offset = _reg_off, \
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.base_bit = _base_bit, \
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.pud_en_offset = _pud_en_off, \
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.pud_sel_offset = _pud_sel_off, \
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.curr_offset = _curr_off, \
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.smt_offset = _smt_off, \
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.power_offset = _pow_off, \
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.curr_type = _curr_type, \
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}
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#define RTK_PIN_SCONFIG(_name, _reg_off, _d_offset, _d_mask, \
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_n_offset, _n_mask, _p_offset, _p_mask) \
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{ \
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.name = # _name, \
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.reg_offset = _reg_off, \
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.dcycle_offset = _d_offset, \
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.dcycle_maskbits = _d_mask, \
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.ndrive_offset = _n_offset, \
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.ndrive_maskbits = _n_mask, \
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.pdrive_offset = _p_offset, \
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.pdrive_maskbits = _p_mask, \
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}
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#define RTK_PIN_FUNC(_mux_val, _name) \
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{ \
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.name = _name, \
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.mux_value = _mux_val, \
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}
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struct rtd_pinctrl_desc {
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const struct pinctrl_pin_desc *pins;
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unsigned int num_pins;
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const struct rtd_pin_group_desc *groups;
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unsigned int num_groups;
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const struct rtd_pin_func_desc *functions;
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unsigned int num_functions;
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const struct rtd_pin_desc *muxes;
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unsigned int num_muxes;
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const struct rtd_pin_config_desc *configs;
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unsigned int num_configs;
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const struct rtd_pin_sconfig_desc *sconfigs;
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unsigned int num_sconfigs;
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struct rtd_pin_reg_list *lists;
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unsigned int num_regs;
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};
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int rtd_pinctrl_probe(struct platform_device *pdev, const struct rtd_pinctrl_desc *desc);
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