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Pending the release of IDs was a way of managing concurrent sysfs and Perf sessions in a single global ID map. Perf may have finished while sysfs hadn't, and Perf shouldn't release the IDs in use by sysfs and vice versa. Now that Perf uses its own exclusive ID maps, pending release doesn't result in any different behavior than just releasing all IDs when the last Perf session finishes. As part of the per-sink trace ID change, we would have still had to make the pending mechanism work on a per-sink basis, due to the overlapping ID allocations, so instead of making that more complicated, just remove it. Signed-off-by: James Clark <james.clark@arm.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: James Clark <james.clark@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20240722101202.26915-16-james.clark@linaro.org
151 lines
4.7 KiB
C
151 lines
4.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright(C) 2022 Linaro Limited. All rights reserved.
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* Author: Mike Leach <mike.leach@linaro.org>
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*/
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#ifndef _CORESIGHT_TRACE_ID_H
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#define _CORESIGHT_TRACE_ID_H
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/*
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* Coresight trace ID allocation API
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*
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* With multi cpu systems, and more additional trace sources a scalable
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* trace ID reservation system is required.
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*
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* The system will allocate Ids on a demand basis, and allow them to be
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* released when done.
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*
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* In order to ensure that a consistent cpu / ID matching is maintained
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* throughout a perf cs_etm event session - a session in progress flag will be
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* maintained for each sink, and IDs are cleared when all the perf sessions
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* complete. This allows the same CPU to be re-allocated its prior ID when
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* events are scheduled in and out.
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*
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*
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* Trace ID maps will be created and initialised to prevent architecturally
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* reserved IDs from being allocated.
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*
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* API permits multiple maps to be maintained - for large systems where
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* different sets of cpus trace into different independent sinks.
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*/
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#include <linux/bitops.h>
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#include <linux/types.h>
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/* ID 0 is reserved */
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#define CORESIGHT_TRACE_ID_RES_0 0
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/* ID 0x70 onwards are reserved */
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#define CORESIGHT_TRACE_ID_RES_TOP 0x70
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/* check an ID is in the valid range */
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#define IS_VALID_CS_TRACE_ID(id) \
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((id > CORESIGHT_TRACE_ID_RES_0) && (id < CORESIGHT_TRACE_ID_RES_TOP))
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/**
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* Read and optionally allocate a CoreSight trace ID and associate with a CPU.
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*
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* Function will read the current trace ID for the associated CPU,
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* allocating an new ID if one is not currently allocated.
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*
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* Numeric ID values allocated use legacy allocation algorithm if possible,
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* otherwise any available ID is used.
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*
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* @cpu: The CPU index to allocate for.
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*
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* return: CoreSight trace ID or -EINVAL if allocation impossible.
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*/
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int coresight_trace_id_get_cpu_id(int cpu);
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/**
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* Version of coresight_trace_id_get_cpu_id() that allows the ID map to operate
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* on to be provided.
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*/
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int coresight_trace_id_get_cpu_id_map(int cpu, struct coresight_trace_id_map *id_map);
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/**
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* Release an allocated trace ID associated with the CPU.
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*
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* This will release the CoreSight trace ID associated with the CPU.
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*
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* @cpu: The CPU index to release the associated trace ID.
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*/
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void coresight_trace_id_put_cpu_id(int cpu);
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/**
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* Version of coresight_trace_id_put_cpu_id() that allows the ID map to operate
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* on to be provided.
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*/
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void coresight_trace_id_put_cpu_id_map(int cpu, struct coresight_trace_id_map *id_map);
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/**
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* Read the current allocated CoreSight Trace ID value for the CPU.
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*
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* Fast read of the current value that does not allocate if no ID allocated
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* for the CPU.
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*
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* Used in perf context where it is known that the value for the CPU will not
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* be changing, when perf starts and event on a core and outputs the Trace ID
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* for the CPU as a packet in the data file. IDs cannot change during a perf
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* session.
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*
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* This function does not take the lock protecting the ID lists, avoiding
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* locking dependency issues with perf locks.
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*
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* @cpu: The CPU index to read.
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*
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* return: current value, will be 0 if unallocated.
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*/
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int coresight_trace_id_read_cpu_id(int cpu);
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/**
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* Version of coresight_trace_id_read_cpu_id() that allows the ID map to operate
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* on to be provided.
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*/
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int coresight_trace_id_read_cpu_id_map(int cpu, struct coresight_trace_id_map *id_map);
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/**
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* Allocate a CoreSight trace ID for a system component.
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*
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* Unconditionally allocates a Trace ID, without associating the ID with a CPU.
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*
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* Used to allocate IDs for system trace sources such as STM.
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*
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* return: Trace ID or -EINVAL if allocation is impossible.
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*/
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int coresight_trace_id_get_system_id(void);
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/**
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* Release an allocated system trace ID.
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*
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* Unconditionally release a trace ID allocated to a system component.
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*
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* @id: value of trace ID allocated.
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*/
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void coresight_trace_id_put_system_id(int id);
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/* notifiers for perf session start and stop */
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/**
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* Notify the Trace ID allocator that a perf session is starting.
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*
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* Increase the perf session reference count - called by perf when setting up a
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* trace event.
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*
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* Perf sessions never free trace IDs to ensure that the ID associated with a
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* CPU cannot change during their and other's concurrent sessions. Instead,
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* this refcount is used so that the last event to finish always frees all IDs.
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*/
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void coresight_trace_id_perf_start(struct coresight_trace_id_map *id_map);
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/**
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* Notify the ID allocator that a perf session is stopping.
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*
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* Decrease the perf session reference count. If this causes the count to go to
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* zero, then all Trace IDs will be released.
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*/
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void coresight_trace_id_perf_stop(struct coresight_trace_id_map *id_map);
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#endif /* _CORESIGHT_TRACE_ID_H */
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