837cd0bdf5
This patch introduces 4-level page tables to ia64. I have run some benchmarks and found nothing interesting. Performance has consistently fallen within the noise range. It also introduces a config option (setting the default to 3 levels). The config option prevents having 4 level page tables with 64k base page size. Signed-off-by: Robin Holt <holt@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
165 lines
3.6 KiB
C
165 lines
3.6 KiB
C
#ifndef _ASM_IA64_PGALLOC_H
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#define _ASM_IA64_PGALLOC_H
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/*
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* This file contains the functions and defines necessary to allocate
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* page tables.
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*
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* This hopefully works with any (fixed) ia-64 page-size, as defined
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* in <asm/page.h> (currently 8192).
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*
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* Copyright (C) 1998-2001 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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* Copyright (C) 2000, Goutham Rao <goutham.rao@intel.com>
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*/
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#include <linux/config.h>
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#include <linux/compiler.h>
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#include <linux/mm.h>
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#include <linux/page-flags.h>
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#include <linux/threads.h>
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#include <asm/mmu_context.h>
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DECLARE_PER_CPU(unsigned long *, __pgtable_quicklist);
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#define pgtable_quicklist __ia64_per_cpu_var(__pgtable_quicklist)
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DECLARE_PER_CPU(long, __pgtable_quicklist_size);
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#define pgtable_quicklist_size __ia64_per_cpu_var(__pgtable_quicklist_size)
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static inline long pgtable_quicklist_total_size(void)
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{
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long ql_size = 0;
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int cpuid;
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for_each_online_cpu(cpuid) {
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ql_size += per_cpu(__pgtable_quicklist_size, cpuid);
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}
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return ql_size;
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}
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static inline void *pgtable_quicklist_alloc(void)
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{
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unsigned long *ret = NULL;
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preempt_disable();
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ret = pgtable_quicklist;
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if (likely(ret != NULL)) {
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pgtable_quicklist = (unsigned long *)(*ret);
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ret[0] = 0;
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--pgtable_quicklist_size;
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preempt_enable();
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} else {
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preempt_enable();
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ret = (unsigned long *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
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}
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return ret;
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}
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static inline void pgtable_quicklist_free(void *pgtable_entry)
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{
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#ifdef CONFIG_NUMA
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unsigned long nid = page_to_nid(virt_to_page(pgtable_entry));
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if (unlikely(nid != numa_node_id())) {
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free_page((unsigned long)pgtable_entry);
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return;
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}
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#endif
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preempt_disable();
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*(unsigned long *)pgtable_entry = (unsigned long)pgtable_quicklist;
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pgtable_quicklist = (unsigned long *)pgtable_entry;
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++pgtable_quicklist_size;
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preempt_enable();
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}
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static inline pgd_t *pgd_alloc(struct mm_struct *mm)
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{
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return pgtable_quicklist_alloc();
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}
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static inline void pgd_free(pgd_t * pgd)
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{
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pgtable_quicklist_free(pgd);
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}
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#ifdef CONFIG_PGTABLE_4
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static inline void
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pgd_populate(struct mm_struct *mm, pgd_t * pgd_entry, pud_t * pud)
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{
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pgd_val(*pgd_entry) = __pa(pud);
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}
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static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr)
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{
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return pgtable_quicklist_alloc();
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}
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static inline void pud_free(pud_t * pud)
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{
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pgtable_quicklist_free(pud);
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}
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#define __pud_free_tlb(tlb, pud) pud_free(pud)
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#endif /* CONFIG_PGTABLE_4 */
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static inline void
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pud_populate(struct mm_struct *mm, pud_t * pud_entry, pmd_t * pmd)
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{
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pud_val(*pud_entry) = __pa(pmd);
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}
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static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
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{
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return pgtable_quicklist_alloc();
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}
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static inline void pmd_free(pmd_t * pmd)
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{
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pgtable_quicklist_free(pmd);
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}
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#define __pmd_free_tlb(tlb, pmd) pmd_free(pmd)
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static inline void
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pmd_populate(struct mm_struct *mm, pmd_t * pmd_entry, struct page *pte)
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{
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pmd_val(*pmd_entry) = page_to_phys(pte);
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}
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static inline void
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pmd_populate_kernel(struct mm_struct *mm, pmd_t * pmd_entry, pte_t * pte)
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{
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pmd_val(*pmd_entry) = __pa(pte);
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}
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static inline struct page *pte_alloc_one(struct mm_struct *mm,
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unsigned long addr)
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{
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return virt_to_page(pgtable_quicklist_alloc());
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}
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static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
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unsigned long addr)
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{
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return pgtable_quicklist_alloc();
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}
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static inline void pte_free(struct page *pte)
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{
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pgtable_quicklist_free(page_address(pte));
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}
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static inline void pte_free_kernel(pte_t * pte)
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{
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pgtable_quicklist_free(pte);
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}
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#define __pte_free_tlb(tlb, pte) pte_free(pte)
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extern void check_pgt_cache(void);
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#endif /* _ASM_IA64_PGALLOC_H */
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