a0607fd3a2
Not as fancy as coccinelle. Checkpatch errors ignored.
Compile tested allyesconfig x86, not all files compiled.
grep -rPl --include=*.[ch] "\brequest_irq\s*\([^,\)]+,\s*\&" drivers/net | while read file ; do \
perl -i -e 'local $/; while (<>) { s@(\brequest_irq\s*\([^,\)]+,\s*)\&@\1@g ; print ; }' $file ;\
done
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
345 lines
8.2 KiB
C
345 lines
8.2 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/platform_device.h>
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#include <asm/mips-boards/simint.h>
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#define MIPSNET_VERSION "2007-11-17"
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/*
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* Net status/control block as seen by sw in the core.
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*/
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struct mipsnet_regs {
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/*
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* Device info for probing, reads as MIPSNET%d where %d is some
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* form of version.
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*/
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u64 devId; /*0x00 */
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/*
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* read only busy flag.
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* Set and cleared by the Net Device to indicate that an rx or a tx
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* is in progress.
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*/
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u32 busy; /*0x08 */
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/*
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* Set by the Net Device.
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* The device will set it once data has been received.
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* The value is the number of bytes that should be read from
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* rxDataBuffer. The value will decrease till 0 until all the data
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* from rxDataBuffer has been read.
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*/
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u32 rxDataCount; /*0x0c */
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#define MIPSNET_MAX_RXTX_DATACOUNT (1 << 16)
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/*
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* Settable from the MIPS core, cleared by the Net Device.
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* The core should set the number of bytes it wants to send,
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* then it should write those bytes of data to txDataBuffer.
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* The device will clear txDataCount has been processed (not
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* necessarily sent).
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*/
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u32 txDataCount; /*0x10 */
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/*
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* Interrupt control
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*
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* Used to clear the interrupted generated by this dev.
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* Write a 1 to clear the interrupt. (except bit31).
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*
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* Bit0 is set if it was a tx-done interrupt.
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* Bit1 is set when new rx-data is available.
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* Until this bit is cleared there will be no other RXs.
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*
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* Bit31 is used for testing, it clears after a read.
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* Writing 1 to this bit will cause an interrupt to be generated.
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* To clear the test interrupt, write 0 to this register.
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*/
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u32 interruptControl; /*0x14 */
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#define MIPSNET_INTCTL_TXDONE (1u << 0)
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#define MIPSNET_INTCTL_RXDONE (1u << 1)
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#define MIPSNET_INTCTL_TESTBIT (1u << 31)
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/*
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* Readonly core-specific interrupt info for the device to signal
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* the core. The meaning of the contents of this field might change.
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*/
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/* XXX: the whole memIntf interrupt scheme is messy: the device
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* should have no control what so ever of what VPE/register set is
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* being used.
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* The MemIntf should only expose interrupt lines, and something in
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* the config should be responsible for the line<->core/vpe bindings.
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*/
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u32 interruptInfo; /*0x18 */
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/*
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* This is where the received data is read out.
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* There is more data to read until rxDataReady is 0.
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* Only 1 byte at this regs offset is used.
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*/
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u32 rxDataBuffer; /*0x1c */
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/*
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* This is where the data to transmit is written.
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* Data should be written for the amount specified in the
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* txDataCount register.
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* Only 1 byte at this regs offset is used.
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*/
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u32 txDataBuffer; /*0x20 */
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};
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#define regaddr(dev, field) \
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(dev->base_addr + offsetof(struct mipsnet_regs, field))
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static char mipsnet_string[] = "mipsnet";
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/*
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* Copy data from the MIPSNET rx data port
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*/
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static int ioiocpy_frommipsnet(struct net_device *dev, unsigned char *kdata,
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int len)
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{
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for (; len > 0; len--, kdata++)
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*kdata = inb(regaddr(dev, rxDataBuffer));
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return inl(regaddr(dev, rxDataCount));
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}
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static inline void mipsnet_put_todevice(struct net_device *dev,
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struct sk_buff *skb)
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{
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int count_to_go = skb->len;
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char *buf_ptr = skb->data;
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outl(skb->len, regaddr(dev, txDataCount));
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for (; count_to_go; buf_ptr++, count_to_go--)
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outb(*buf_ptr, regaddr(dev, txDataBuffer));
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dev->stats.tx_packets++;
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dev->stats.tx_bytes += skb->len;
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dev_kfree_skb(skb);
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}
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static int mipsnet_xmit(struct sk_buff *skb, struct net_device *dev)
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{
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/*
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* Only one packet at a time. Once TXDONE interrupt is serviced, the
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* queue will be restarted.
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*/
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netif_stop_queue(dev);
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mipsnet_put_todevice(dev, skb);
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return NETDEV_TX_OK;
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}
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static inline ssize_t mipsnet_get_fromdev(struct net_device *dev, size_t len)
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{
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struct sk_buff *skb;
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if (!len)
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return len;
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skb = dev_alloc_skb(len + NET_IP_ALIGN);
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if (!skb) {
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dev->stats.rx_dropped++;
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return -ENOMEM;
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}
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skb_reserve(skb, NET_IP_ALIGN);
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if (ioiocpy_frommipsnet(dev, skb_put(skb, len), len))
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return -EFAULT;
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skb->protocol = eth_type_trans(skb, dev);
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skb->ip_summed = CHECKSUM_UNNECESSARY;
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netif_rx(skb);
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dev->stats.rx_packets++;
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dev->stats.rx_bytes += len;
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return len;
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}
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static irqreturn_t mipsnet_interrupt(int irq, void *dev_id)
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{
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struct net_device *dev = dev_id;
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u32 int_flags;
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irqreturn_t ret = IRQ_NONE;
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if (irq != dev->irq)
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goto out_badirq;
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/* TESTBIT is cleared on read. */
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int_flags = inl(regaddr(dev, interruptControl));
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if (int_flags & MIPSNET_INTCTL_TESTBIT) {
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/* TESTBIT takes effect after a write with 0. */
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outl(0, regaddr(dev, interruptControl));
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ret = IRQ_HANDLED;
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} else if (int_flags & MIPSNET_INTCTL_TXDONE) {
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/* Only one packet at a time, we are done. */
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dev->stats.tx_packets++;
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netif_wake_queue(dev);
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outl(MIPSNET_INTCTL_TXDONE,
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regaddr(dev, interruptControl));
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ret = IRQ_HANDLED;
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} else if (int_flags & MIPSNET_INTCTL_RXDONE) {
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mipsnet_get_fromdev(dev, inl(regaddr(dev, rxDataCount)));
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outl(MIPSNET_INTCTL_RXDONE, regaddr(dev, interruptControl));
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ret = IRQ_HANDLED;
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}
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return ret;
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out_badirq:
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printk(KERN_INFO "%s: %s(): irq %d for unknown device\n",
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dev->name, __func__, irq);
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return ret;
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}
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static int mipsnet_open(struct net_device *dev)
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{
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int err;
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err = request_irq(dev->irq, mipsnet_interrupt,
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IRQF_SHARED, dev->name, (void *) dev);
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if (err) {
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release_region(dev->base_addr, sizeof(struct mipsnet_regs));
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return err;
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}
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netif_start_queue(dev);
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/* test interrupt handler */
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outl(MIPSNET_INTCTL_TESTBIT, regaddr(dev, interruptControl));
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return 0;
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}
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static int mipsnet_close(struct net_device *dev)
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{
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netif_stop_queue(dev);
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free_irq(dev->irq, dev);
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return 0;
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}
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static void mipsnet_set_mclist(struct net_device *dev)
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{
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}
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static const struct net_device_ops mipsnet_netdev_ops = {
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.ndo_open = mipsnet_open,
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.ndo_stop = mipsnet_close,
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.ndo_start_xmit = mipsnet_xmit,
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.ndo_set_multicast_list = mipsnet_set_mclist,
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.ndo_change_mtu = eth_change_mtu,
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.ndo_validate_addr = eth_validate_addr,
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.ndo_set_mac_address = eth_mac_addr,
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};
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static int __init mipsnet_probe(struct platform_device *dev)
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{
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struct net_device *netdev;
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int err;
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netdev = alloc_etherdev(0);
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if (!netdev) {
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err = -ENOMEM;
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goto out;
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}
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platform_set_drvdata(dev, netdev);
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netdev->netdev_ops = &mipsnet_netdev_ops;
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/*
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* TODO: probe for these or load them from PARAM
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*/
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netdev->base_addr = 0x4200;
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netdev->irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_MB0 +
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inl(regaddr(netdev, interruptInfo));
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/* Get the io region now, get irq on open() */
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if (!request_region(netdev->base_addr, sizeof(struct mipsnet_regs),
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"mipsnet")) {
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err = -EBUSY;
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goto out_free_netdev;
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}
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/*
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* Lacking any better mechanism to allocate a MAC address we use a
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* random one ...
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*/
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random_ether_addr(netdev->dev_addr);
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err = register_netdev(netdev);
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if (err) {
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printk(KERN_ERR "MIPSNet: failed to register netdev.\n");
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goto out_free_region;
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}
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return 0;
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out_free_region:
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release_region(netdev->base_addr, sizeof(struct mipsnet_regs));
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out_free_netdev:
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free_netdev(netdev);
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out:
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return err;
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}
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static int __devexit mipsnet_device_remove(struct platform_device *device)
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{
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struct net_device *dev = platform_get_drvdata(device);
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unregister_netdev(dev);
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release_region(dev->base_addr, sizeof(struct mipsnet_regs));
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free_netdev(dev);
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platform_set_drvdata(device, NULL);
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return 0;
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}
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static struct platform_driver mipsnet_driver = {
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.driver = {
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.name = mipsnet_string,
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.owner = THIS_MODULE,
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},
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.probe = mipsnet_probe,
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.remove = __devexit_p(mipsnet_device_remove),
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};
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static int __init mipsnet_init_module(void)
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{
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int err;
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printk(KERN_INFO "MIPSNet Ethernet driver. Version: %s. "
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"(c)2005 MIPS Technologies, Inc.\n", MIPSNET_VERSION);
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err = platform_driver_register(&mipsnet_driver);
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if (err)
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printk(KERN_ERR "Driver registration failed\n");
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return err;
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}
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static void __exit mipsnet_exit_module(void)
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{
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platform_driver_unregister(&mipsnet_driver);
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}
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module_init(mipsnet_init_module);
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module_exit(mipsnet_exit_module);
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