5dd820cbfc
This prepares the pwm-apple driver to further changes of the pwm core outlined in the commit introducing devm_pwmchip_alloc(). There is no intended semantical change and the driver should behave as before. Link: https://lore.kernel.org/r/34cf20a82ca07bb4ec0578b193daa5caed37825e.1707900770.git.u.kleine-koenig@pengutronix.de Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
160 lines
4.3 KiB
C
160 lines
4.3 KiB
C
// SPDX-License-Identifier: GPL-2.0 OR MIT
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/*
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* Driver for the Apple SoC PWM controller
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*
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* Copyright The Asahi Linux Contributors
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*
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* Limitations:
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* - The writes to cycle registers are shadowed until a write to
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* the control register.
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* - If both OFF_CYCLES and ON_CYCLES are set to 0, the output
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* is a constant off signal.
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* - When APPLE_PWM_CTRL is set to 0, the output is constant low
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*/
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/pwm.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/math64.h>
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#define APPLE_PWM_CTRL 0x00
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#define APPLE_PWM_ON_CYCLES 0x1c
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#define APPLE_PWM_OFF_CYCLES 0x18
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#define APPLE_PWM_CTRL_ENABLE BIT(0)
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#define APPLE_PWM_CTRL_MODE BIT(2)
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#define APPLE_PWM_CTRL_UPDATE BIT(5)
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#define APPLE_PWM_CTRL_TRIGGER BIT(9)
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#define APPLE_PWM_CTRL_INVERT BIT(10)
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#define APPLE_PWM_CTRL_OUTPUT_ENABLE BIT(14)
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struct apple_pwm {
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void __iomem *base;
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u64 clkrate;
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};
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static inline struct apple_pwm *to_apple_pwm(struct pwm_chip *chip)
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{
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return pwmchip_get_drvdata(chip);
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}
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static int apple_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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const struct pwm_state *state)
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{
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struct apple_pwm *fpwm;
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if (state->polarity == PWM_POLARITY_INVERSED)
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return -EINVAL;
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fpwm = to_apple_pwm(chip);
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if (state->enabled) {
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u64 on_cycles, off_cycles;
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on_cycles = mul_u64_u64_div_u64(fpwm->clkrate,
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state->duty_cycle, NSEC_PER_SEC);
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if (on_cycles > 0xFFFFFFFF)
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on_cycles = 0xFFFFFFFF;
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off_cycles = mul_u64_u64_div_u64(fpwm->clkrate,
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state->period, NSEC_PER_SEC) - on_cycles;
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if (off_cycles > 0xFFFFFFFF)
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off_cycles = 0xFFFFFFFF;
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writel(on_cycles, fpwm->base + APPLE_PWM_ON_CYCLES);
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writel(off_cycles, fpwm->base + APPLE_PWM_OFF_CYCLES);
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writel(APPLE_PWM_CTRL_ENABLE | APPLE_PWM_CTRL_OUTPUT_ENABLE | APPLE_PWM_CTRL_UPDATE,
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fpwm->base + APPLE_PWM_CTRL);
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} else {
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writel(0, fpwm->base + APPLE_PWM_CTRL);
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}
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return 0;
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}
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static int apple_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
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struct pwm_state *state)
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{
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struct apple_pwm *fpwm;
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u32 on_cycles, off_cycles, ctrl;
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fpwm = to_apple_pwm(chip);
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ctrl = readl(fpwm->base + APPLE_PWM_CTRL);
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on_cycles = readl(fpwm->base + APPLE_PWM_ON_CYCLES);
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off_cycles = readl(fpwm->base + APPLE_PWM_OFF_CYCLES);
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state->enabled = (ctrl & APPLE_PWM_CTRL_ENABLE) && (ctrl & APPLE_PWM_CTRL_OUTPUT_ENABLE);
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state->polarity = PWM_POLARITY_NORMAL;
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// on_cycles + off_cycles is 33 bits, NSEC_PER_SEC is 30, there is no overflow
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state->duty_cycle = DIV64_U64_ROUND_UP((u64)on_cycles * NSEC_PER_SEC, fpwm->clkrate);
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state->period = DIV64_U64_ROUND_UP(((u64)off_cycles + (u64)on_cycles) *
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NSEC_PER_SEC, fpwm->clkrate);
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return 0;
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}
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static const struct pwm_ops apple_pwm_ops = {
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.apply = apple_pwm_apply,
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.get_state = apple_pwm_get_state,
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};
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static int apple_pwm_probe(struct platform_device *pdev)
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{
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struct pwm_chip *chip;
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struct apple_pwm *fpwm;
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struct clk *clk;
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int ret;
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chip = devm_pwmchip_alloc(&pdev->dev, 1, sizeof(*fpwm));
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if (IS_ERR(chip))
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return PTR_ERR(chip);
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fpwm = to_apple_pwm(chip);
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fpwm->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(fpwm->base))
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return PTR_ERR(fpwm->base);
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clk = devm_clk_get_enabled(&pdev->dev, NULL);
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if (IS_ERR(clk))
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return dev_err_probe(&pdev->dev, PTR_ERR(clk), "unable to get the clock");
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/*
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* Uses the 24MHz system clock on all existing devices, can only
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* happen if the device tree is broken
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*
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* This check is done to prevent an overflow in .apply
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*/
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fpwm->clkrate = clk_get_rate(clk);
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if (fpwm->clkrate > NSEC_PER_SEC)
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return dev_err_probe(&pdev->dev, -EINVAL, "pwm clock out of range");
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chip->ops = &apple_pwm_ops;
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ret = devm_pwmchip_add(&pdev->dev, chip);
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if (ret < 0)
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return dev_err_probe(&pdev->dev, ret, "unable to add pwm chip");
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return 0;
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}
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static const struct of_device_id apple_pwm_of_match[] = {
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{ .compatible = "apple,s5l-fpwm" },
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{}
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};
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MODULE_DEVICE_TABLE(of, apple_pwm_of_match);
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static struct platform_driver apple_pwm_driver = {
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.probe = apple_pwm_probe,
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.driver = {
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.name = "apple-pwm",
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.of_match_table = apple_pwm_of_match,
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},
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};
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module_platform_driver(apple_pwm_driver);
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MODULE_DESCRIPTION("Apple SoC PWM driver");
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MODULE_LICENSE("Dual MIT/GPL");
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