c942fddf87
Based on 3 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [graeme] [gregory] [gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema] [hk] [hemahk]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1105 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.202006027@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
84 lines
2.1 KiB
C
84 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* cx18 driver PCI memory mapped IO access routines
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*
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* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
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* Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
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*/
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#include "cx18-driver.h"
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#include "cx18-io.h"
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#include "cx18-irq.h"
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void cx18_memset_io(struct cx18 *cx, void __iomem *addr, int val, size_t count)
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{
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u8 __iomem *dst = addr;
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u16 val2 = val | (val << 8);
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u32 val4 = val2 | (val2 << 16);
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/* Align writes on the CX23418's addresses */
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if ((count > 0) && ((unsigned long)dst & 1)) {
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cx18_writeb(cx, (u8) val, dst);
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count--;
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dst++;
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}
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if ((count > 1) && ((unsigned long)dst & 2)) {
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cx18_writew(cx, val2, dst);
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count -= 2;
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dst += 2;
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}
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while (count > 3) {
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cx18_writel(cx, val4, dst);
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count -= 4;
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dst += 4;
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}
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if (count > 1) {
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cx18_writew(cx, val2, dst);
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count -= 2;
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dst += 2;
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}
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if (count > 0)
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cx18_writeb(cx, (u8) val, dst);
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}
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void cx18_sw1_irq_enable(struct cx18 *cx, u32 val)
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{
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cx18_write_reg_expect(cx, val, SW1_INT_STATUS, ~val, val);
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cx->sw1_irq_mask = cx18_read_reg(cx, SW1_INT_ENABLE_PCI) | val;
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cx18_write_reg(cx, cx->sw1_irq_mask, SW1_INT_ENABLE_PCI);
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}
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void cx18_sw1_irq_disable(struct cx18 *cx, u32 val)
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{
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cx->sw1_irq_mask = cx18_read_reg(cx, SW1_INT_ENABLE_PCI) & ~val;
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cx18_write_reg(cx, cx->sw1_irq_mask, SW1_INT_ENABLE_PCI);
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}
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void cx18_sw2_irq_enable(struct cx18 *cx, u32 val)
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{
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cx18_write_reg_expect(cx, val, SW2_INT_STATUS, ~val, val);
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cx->sw2_irq_mask = cx18_read_reg(cx, SW2_INT_ENABLE_PCI) | val;
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cx18_write_reg(cx, cx->sw2_irq_mask, SW2_INT_ENABLE_PCI);
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}
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void cx18_sw2_irq_disable(struct cx18 *cx, u32 val)
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{
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cx->sw2_irq_mask = cx18_read_reg(cx, SW2_INT_ENABLE_PCI) & ~val;
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cx18_write_reg(cx, cx->sw2_irq_mask, SW2_INT_ENABLE_PCI);
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}
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void cx18_sw2_irq_disable_cpu(struct cx18 *cx, u32 val)
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{
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u32 r;
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r = cx18_read_reg(cx, SW2_INT_ENABLE_CPU);
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cx18_write_reg(cx, r & ~val, SW2_INT_ENABLE_CPU);
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}
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void cx18_setup_page(struct cx18 *cx, u32 addr)
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{
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u32 val;
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val = cx18_read_reg(cx, 0xD000F8);
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val = (val & ~0x1f00) | ((addr >> 17) & 0x1f00);
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cx18_write_reg(cx, val, 0xD000F8);
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}
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