3cc808e323
Some reported by Stephen Rothwell. The rest were found by running the kernel-doc build script. Some indentation fixes. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202311241526.Y2WZeUau-lkp@intel.com/ Signed-off-by: Donald Robson <donald.robson@imgtec.com> Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20231128173507.95119-1-donald.robson@imgtec.com
170 lines
4.5 KiB
C
170 lines
4.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
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/* Copyright (c) 2023 Imagination Technologies Ltd. */
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#ifndef PVR_QUEUE_H
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#define PVR_QUEUE_H
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#include <drm/gpu_scheduler.h>
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#include "pvr_cccb.h"
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#include "pvr_device.h"
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struct pvr_context;
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struct pvr_queue;
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/**
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* struct pvr_queue_fence_ctx - Queue fence context
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*
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* Used to implement dma_fence_ops for pvr_job::{done,cccb}_fence.
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*/
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struct pvr_queue_fence_ctx {
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/** @id: Fence context ID allocated with dma_fence_context_alloc(). */
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u64 id;
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/** @seqno: Sequence number incremented each time a fence is created. */
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atomic_t seqno;
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/** @lock: Lock used to synchronize access to fences allocated by this context. */
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spinlock_t lock;
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};
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/**
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* struct pvr_queue_cccb_fence_ctx - CCCB fence context
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*
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* Context used to manage fences controlling access to the CCCB. No fences are
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* issued if there's enough space in the CCCB to push job commands.
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*/
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struct pvr_queue_cccb_fence_ctx {
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/** @base: Base queue fence context. */
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struct pvr_queue_fence_ctx base;
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/**
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* @job: Job waiting for CCCB space.
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*
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* Thanks to the serializationg done at the drm_sched_entity level,
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* there's no more than one job waiting for CCCB at a given time.
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*
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* This field is NULL if no jobs are currently waiting for CCCB space.
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*
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* Must be accessed with @job_lock held.
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*/
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struct pvr_job *job;
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/** @job_lock: Lock protecting access to the job object. */
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struct mutex job_lock;
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};
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/**
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* struct pvr_queue_fence - Queue fence object
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*/
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struct pvr_queue_fence {
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/** @base: Base dma_fence. */
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struct dma_fence base;
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/** @queue: Queue that created this fence. */
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struct pvr_queue *queue;
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};
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/**
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* struct pvr_queue - Job queue
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*
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* Used to queue and track execution of pvr_job objects.
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*/
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struct pvr_queue {
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/** @scheduler: Single entity scheduler use to push jobs to this queue. */
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struct drm_gpu_scheduler scheduler;
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/** @entity: Scheduling entity backing this queue. */
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struct drm_sched_entity entity;
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/** @type: Type of jobs queued to this queue. */
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enum drm_pvr_job_type type;
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/** @ctx: Context object this queue is bound to. */
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struct pvr_context *ctx;
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/** @node: Used to add the queue to the active/idle queue list. */
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struct list_head node;
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/**
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* @in_flight_job_count: Number of jobs submitted to the CCCB that
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* have not been processed yet.
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*/
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atomic_t in_flight_job_count;
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/**
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* @cccb_fence_ctx: CCCB fence context.
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*
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* Used to control access to the CCCB is full, such that we don't
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* end up trying to push commands to the CCCB if there's not enough
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* space to receive all commands needed for a job to complete.
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*/
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struct pvr_queue_cccb_fence_ctx cccb_fence_ctx;
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/** @job_fence_ctx: Job fence context object. */
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struct pvr_queue_fence_ctx job_fence_ctx;
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/** @timeline_ufo: Timeline UFO for the context queue. */
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struct {
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/** @fw_obj: FW object representing the UFO value. */
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struct pvr_fw_object *fw_obj;
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/** @value: CPU mapping of the UFO value. */
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u32 *value;
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} timeline_ufo;
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/**
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* @last_queued_job_scheduled_fence: The scheduled fence of the last
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* job queued to this queue.
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*
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* We use it to insert frag -> geom dependencies when issuing combined
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* geom+frag jobs, to guarantee that the fragment job that's part of
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* the combined operation comes after all fragment jobs that were queued
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* before it.
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*/
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struct dma_fence *last_queued_job_scheduled_fence;
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/** @cccb: Client Circular Command Buffer. */
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struct pvr_cccb cccb;
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/** @reg_state_obj: FW object representing the register state of this queue. */
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struct pvr_fw_object *reg_state_obj;
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/** @ctx_offset: Offset of the queue context in the FW context object. */
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u32 ctx_offset;
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/** @callstack_addr: Initial call stack address for register state object. */
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u64 callstack_addr;
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};
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bool pvr_queue_fence_is_ufo_backed(struct dma_fence *f);
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int pvr_queue_job_init(struct pvr_job *job);
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void pvr_queue_job_cleanup(struct pvr_job *job);
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void pvr_queue_job_push(struct pvr_job *job);
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struct dma_fence *pvr_queue_job_arm(struct pvr_job *job);
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struct pvr_queue *pvr_queue_create(struct pvr_context *ctx,
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enum drm_pvr_job_type type,
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struct drm_pvr_ioctl_create_context_args *args,
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void *fw_ctx_map);
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void pvr_queue_kill(struct pvr_queue *queue);
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void pvr_queue_destroy(struct pvr_queue *queue);
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void pvr_queue_process(struct pvr_queue *queue);
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void pvr_queue_device_pre_reset(struct pvr_device *pvr_dev);
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void pvr_queue_device_post_reset(struct pvr_device *pvr_dev);
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int pvr_queue_device_init(struct pvr_device *pvr_dev);
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void pvr_queue_device_fini(struct pvr_device *pvr_dev);
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#endif /* PVR_QUEUE_H */
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