6ab3d5624e
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
51 lines
1.4 KiB
C
51 lines
1.4 KiB
C
/*
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* This file contains work-arounds for x86 and x86_64 platform bugs.
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*/
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#include <linux/pci.h>
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#include <linux/irq.h>
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#if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_SMP) && defined(CONFIG_PCI)
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static void __devinit quirk_intel_irqbalance(struct pci_dev *dev)
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{
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u8 config, rev;
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u32 word;
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/* BIOS may enable hardware IRQ balancing for
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* E7520/E7320/E7525(revision ID 0x9 and below)
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* based platforms.
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* Disable SW irqbalance/affinity on those platforms.
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*/
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pci_read_config_byte(dev, PCI_CLASS_REVISION, &rev);
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if (rev > 0x9)
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return;
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printk(KERN_INFO "Intel E7520/7320/7525 detected.");
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/* enable access to config space*/
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pci_read_config_byte(dev, 0xf4, &config);
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pci_write_config_byte(dev, 0xf4, config|0x2);
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/* read xTPR register */
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raw_pci_ops->read(0, 0, 0x40, 0x4c, 2, &word);
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if (!(word & (1 << 13))) {
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printk(KERN_INFO "Disabling irq balancing and affinity\n");
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#ifdef CONFIG_IRQBALANCE
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irqbalance_disable("");
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#endif
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noirqdebug_setup("");
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#ifdef CONFIG_PROC_FS
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no_irq_affinity = 1;
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#endif
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}
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/* put back the original value for config space*/
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if (!(config & 0x2))
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pci_write_config_byte(dev, 0xf4, config);
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7320_MCH, quirk_intel_irqbalance);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7525_MCH, quirk_intel_irqbalance);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7520_MCH, quirk_intel_irqbalance);
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#endif
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