bbab4f3bb7
VMI timer code. It works by taking over the local APIC clock when APIC is configured, which requires a couple hooks into the APIC code. The backend timer code could be commonized into the timer infrastructure, but there are some pieces missing (stolen time, in particular), and the exact semantics of when to do accounting for NO_IDLE need to be shared between different hypervisors as well. So for now, VMI timer is a separate module. [Adrian Bunk: cleanups] Subject: VMI timer patches Signed-off-by: Zachary Amsden <zach@vmware.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Cc: Jeremy Fitzhardinge <jeremy@xensource.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Andrew Morton <akpm@osdl.org>
556 lines
16 KiB
C
556 lines
16 KiB
C
#ifndef __ASM_PARAVIRT_H
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#define __ASM_PARAVIRT_H
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/* Various instructions on x86 need to be replaced for
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* para-virtualization: those hooks are defined here. */
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#include <linux/linkage.h>
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#include <linux/stringify.h>
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#include <asm/page.h>
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#ifdef CONFIG_PARAVIRT
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/* These are the most performance critical ops, so we want to be able to patch
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* callers */
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#define PARAVIRT_IRQ_DISABLE 0
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#define PARAVIRT_IRQ_ENABLE 1
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#define PARAVIRT_RESTORE_FLAGS 2
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#define PARAVIRT_SAVE_FLAGS 3
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#define PARAVIRT_SAVE_FLAGS_IRQ_DISABLE 4
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#define PARAVIRT_INTERRUPT_RETURN 5
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#define PARAVIRT_STI_SYSEXIT 6
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/* Bitmask of what can be clobbered: usually at least eax. */
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#define CLBR_NONE 0x0
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#define CLBR_EAX 0x1
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#define CLBR_ECX 0x2
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#define CLBR_EDX 0x4
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#define CLBR_ANY 0x7
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#ifndef __ASSEMBLY__
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struct thread_struct;
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struct Xgt_desc_struct;
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struct tss_struct;
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struct mm_struct;
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struct paravirt_ops
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{
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unsigned int kernel_rpl;
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int paravirt_enabled;
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const char *name;
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/*
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* Patch may replace one of the defined code sequences with arbitrary
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* code, subject to the same register constraints. This generally
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* means the code is not free to clobber any registers other than EAX.
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* The patch function should return the number of bytes of code
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* generated, as we nop pad the rest in generic code.
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*/
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unsigned (*patch)(u8 type, u16 clobber, void *firstinsn, unsigned len);
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void (*arch_setup)(void);
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char *(*memory_setup)(void);
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void (*init_IRQ)(void);
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void (*banner)(void);
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unsigned long (*get_wallclock)(void);
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int (*set_wallclock)(unsigned long);
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void (*time_init)(void);
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/* All the function pointers here are declared as "fastcall"
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so that we get a specific register-based calling
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convention. This makes it easier to implement inline
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assembler replacements. */
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void (fastcall *cpuid)(unsigned int *eax, unsigned int *ebx,
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unsigned int *ecx, unsigned int *edx);
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unsigned long (fastcall *get_debugreg)(int regno);
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void (fastcall *set_debugreg)(int regno, unsigned long value);
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void (fastcall *clts)(void);
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unsigned long (fastcall *read_cr0)(void);
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void (fastcall *write_cr0)(unsigned long);
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unsigned long (fastcall *read_cr2)(void);
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void (fastcall *write_cr2)(unsigned long);
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unsigned long (fastcall *read_cr3)(void);
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void (fastcall *write_cr3)(unsigned long);
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unsigned long (fastcall *read_cr4_safe)(void);
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unsigned long (fastcall *read_cr4)(void);
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void (fastcall *write_cr4)(unsigned long);
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unsigned long (fastcall *save_fl)(void);
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void (fastcall *restore_fl)(unsigned long);
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void (fastcall *irq_disable)(void);
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void (fastcall *irq_enable)(void);
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void (fastcall *safe_halt)(void);
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void (fastcall *halt)(void);
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void (fastcall *wbinvd)(void);
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/* err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
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u64 (fastcall *read_msr)(unsigned int msr, int *err);
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int (fastcall *write_msr)(unsigned int msr, u64 val);
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u64 (fastcall *read_tsc)(void);
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u64 (fastcall *read_pmc)(void);
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void (fastcall *load_tr_desc)(void);
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void (fastcall *load_gdt)(const struct Xgt_desc_struct *);
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void (fastcall *load_idt)(const struct Xgt_desc_struct *);
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void (fastcall *store_gdt)(struct Xgt_desc_struct *);
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void (fastcall *store_idt)(struct Xgt_desc_struct *);
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void (fastcall *set_ldt)(const void *desc, unsigned entries);
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unsigned long (fastcall *store_tr)(void);
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void (fastcall *load_tls)(struct thread_struct *t, unsigned int cpu);
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void (fastcall *write_ldt_entry)(void *dt, int entrynum,
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u32 low, u32 high);
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void (fastcall *write_gdt_entry)(void *dt, int entrynum,
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u32 low, u32 high);
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void (fastcall *write_idt_entry)(void *dt, int entrynum,
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u32 low, u32 high);
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void (fastcall *load_esp0)(struct tss_struct *tss,
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struct thread_struct *thread);
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void (fastcall *set_iopl_mask)(unsigned mask);
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void (fastcall *io_delay)(void);
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void (*const_udelay)(unsigned long loops);
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#ifdef CONFIG_X86_LOCAL_APIC
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void (fastcall *apic_write)(unsigned long reg, unsigned long v);
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void (fastcall *apic_write_atomic)(unsigned long reg, unsigned long v);
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unsigned long (fastcall *apic_read)(unsigned long reg);
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void (*setup_boot_clock)(void);
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void (*setup_secondary_clock)(void);
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#endif
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void (fastcall *flush_tlb_user)(void);
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void (fastcall *flush_tlb_kernel)(void);
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void (fastcall *flush_tlb_single)(u32 addr);
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void (fastcall *alloc_pt)(u32 pfn);
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void (fastcall *alloc_pd)(u32 pfn);
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void (fastcall *alloc_pd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
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void (fastcall *release_pt)(u32 pfn);
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void (fastcall *release_pd)(u32 pfn);
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void (fastcall *set_pte)(pte_t *ptep, pte_t pteval);
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void (fastcall *set_pte_at)(struct mm_struct *mm, u32 addr, pte_t *ptep, pte_t pteval);
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void (fastcall *set_pmd)(pmd_t *pmdp, pmd_t pmdval);
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void (fastcall *pte_update)(struct mm_struct *mm, u32 addr, pte_t *ptep);
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void (fastcall *pte_update_defer)(struct mm_struct *mm, u32 addr, pte_t *ptep);
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#ifdef CONFIG_X86_PAE
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void (fastcall *set_pte_atomic)(pte_t *ptep, pte_t pteval);
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void (fastcall *set_pte_present)(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte);
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void (fastcall *set_pud)(pud_t *pudp, pud_t pudval);
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void (fastcall *pte_clear)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
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void (fastcall *pmd_clear)(pmd_t *pmdp);
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#endif
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void (fastcall *set_lazy_mode)(int mode);
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/* These two are jmp to, not actually called. */
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void (fastcall *irq_enable_sysexit)(void);
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void (fastcall *iret)(void);
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void (fastcall *startup_ipi_hook)(int phys_apicid, unsigned long start_eip, unsigned long start_esp);
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};
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/* Mark a paravirt probe function. */
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#define paravirt_probe(fn) \
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static asmlinkage void (*__paravirtprobe_##fn)(void) __attribute_used__ \
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__attribute__((__section__(".paravirtprobe"))) = fn
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extern struct paravirt_ops paravirt_ops;
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#define paravirt_enabled() (paravirt_ops.paravirt_enabled)
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static inline void load_esp0(struct tss_struct *tss,
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struct thread_struct *thread)
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{
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paravirt_ops.load_esp0(tss, thread);
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}
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#define ARCH_SETUP paravirt_ops.arch_setup();
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static inline unsigned long get_wallclock(void)
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{
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return paravirt_ops.get_wallclock();
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}
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static inline int set_wallclock(unsigned long nowtime)
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{
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return paravirt_ops.set_wallclock(nowtime);
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}
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static inline void do_time_init(void)
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{
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return paravirt_ops.time_init();
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}
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/* The paravirtualized CPUID instruction. */
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static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
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unsigned int *ecx, unsigned int *edx)
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{
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paravirt_ops.cpuid(eax, ebx, ecx, edx);
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}
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/*
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* These special macros can be used to get or set a debugging register
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*/
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#define get_debugreg(var, reg) var = paravirt_ops.get_debugreg(reg)
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#define set_debugreg(val, reg) paravirt_ops.set_debugreg(reg, val)
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#define clts() paravirt_ops.clts()
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#define read_cr0() paravirt_ops.read_cr0()
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#define write_cr0(x) paravirt_ops.write_cr0(x)
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#define read_cr2() paravirt_ops.read_cr2()
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#define write_cr2(x) paravirt_ops.write_cr2(x)
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#define read_cr3() paravirt_ops.read_cr3()
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#define write_cr3(x) paravirt_ops.write_cr3(x)
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#define read_cr4() paravirt_ops.read_cr4()
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#define read_cr4_safe(x) paravirt_ops.read_cr4_safe()
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#define write_cr4(x) paravirt_ops.write_cr4(x)
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static inline void raw_safe_halt(void)
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{
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paravirt_ops.safe_halt();
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}
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static inline void halt(void)
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{
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paravirt_ops.safe_halt();
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}
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#define wbinvd() paravirt_ops.wbinvd()
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#define get_kernel_rpl() (paravirt_ops.kernel_rpl)
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#define rdmsr(msr,val1,val2) do { \
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int _err; \
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u64 _l = paravirt_ops.read_msr(msr,&_err); \
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val1 = (u32)_l; \
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val2 = _l >> 32; \
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} while(0)
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#define wrmsr(msr,val1,val2) do { \
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u64 _l = ((u64)(val2) << 32) | (val1); \
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paravirt_ops.write_msr((msr), _l); \
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} while(0)
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#define rdmsrl(msr,val) do { \
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int _err; \
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val = paravirt_ops.read_msr((msr),&_err); \
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} while(0)
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#define wrmsrl(msr,val) (paravirt_ops.write_msr((msr),(val)))
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#define wrmsr_safe(msr,a,b) ({ \
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u64 _l = ((u64)(b) << 32) | (a); \
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paravirt_ops.write_msr((msr),_l); \
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})
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/* rdmsr with exception handling */
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#define rdmsr_safe(msr,a,b) ({ \
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int _err; \
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u64 _l = paravirt_ops.read_msr(msr,&_err); \
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(*a) = (u32)_l; \
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(*b) = _l >> 32; \
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_err; })
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#define rdtsc(low,high) do { \
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u64 _l = paravirt_ops.read_tsc(); \
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low = (u32)_l; \
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high = _l >> 32; \
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} while(0)
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#define rdtscl(low) do { \
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u64 _l = paravirt_ops.read_tsc(); \
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low = (int)_l; \
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} while(0)
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#define rdtscll(val) (val = paravirt_ops.read_tsc())
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#define write_tsc(val1,val2) wrmsr(0x10, val1, val2)
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#define rdpmc(counter,low,high) do { \
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u64 _l = paravirt_ops.read_pmc(); \
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low = (u32)_l; \
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high = _l >> 32; \
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} while(0)
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#define load_TR_desc() (paravirt_ops.load_tr_desc())
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#define load_gdt(dtr) (paravirt_ops.load_gdt(dtr))
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#define load_idt(dtr) (paravirt_ops.load_idt(dtr))
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#define set_ldt(addr, entries) (paravirt_ops.set_ldt((addr), (entries)))
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#define store_gdt(dtr) (paravirt_ops.store_gdt(dtr))
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#define store_idt(dtr) (paravirt_ops.store_idt(dtr))
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#define store_tr(tr) ((tr) = paravirt_ops.store_tr())
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#define load_TLS(t,cpu) (paravirt_ops.load_tls((t),(cpu)))
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#define write_ldt_entry(dt, entry, low, high) \
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(paravirt_ops.write_ldt_entry((dt), (entry), (low), (high)))
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#define write_gdt_entry(dt, entry, low, high) \
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(paravirt_ops.write_gdt_entry((dt), (entry), (low), (high)))
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#define write_idt_entry(dt, entry, low, high) \
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(paravirt_ops.write_idt_entry((dt), (entry), (low), (high)))
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#define set_iopl_mask(mask) (paravirt_ops.set_iopl_mask(mask))
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/* The paravirtualized I/O functions */
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static inline void slow_down_io(void) {
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paravirt_ops.io_delay();
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#ifdef REALLY_SLOW_IO
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paravirt_ops.io_delay();
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paravirt_ops.io_delay();
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paravirt_ops.io_delay();
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#endif
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}
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#ifdef CONFIG_X86_LOCAL_APIC
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/*
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* Basic functions accessing APICs.
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*/
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static inline void apic_write(unsigned long reg, unsigned long v)
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{
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paravirt_ops.apic_write(reg,v);
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}
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static inline void apic_write_atomic(unsigned long reg, unsigned long v)
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{
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paravirt_ops.apic_write_atomic(reg,v);
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}
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static inline unsigned long apic_read(unsigned long reg)
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{
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return paravirt_ops.apic_read(reg);
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}
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static inline void setup_boot_clock(void)
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{
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paravirt_ops.setup_boot_clock();
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}
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static inline void setup_secondary_clock(void)
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{
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paravirt_ops.setup_secondary_clock();
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}
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#endif
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#ifdef CONFIG_SMP
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static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
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unsigned long start_esp)
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{
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return paravirt_ops.startup_ipi_hook(phys_apicid, start_eip, start_esp);
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}
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#endif
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#define __flush_tlb() paravirt_ops.flush_tlb_user()
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#define __flush_tlb_global() paravirt_ops.flush_tlb_kernel()
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#define __flush_tlb_single(addr) paravirt_ops.flush_tlb_single(addr)
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#define paravirt_alloc_pt(pfn) paravirt_ops.alloc_pt(pfn)
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#define paravirt_release_pt(pfn) paravirt_ops.release_pt(pfn)
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#define paravirt_alloc_pd(pfn) paravirt_ops.alloc_pd(pfn)
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#define paravirt_alloc_pd_clone(pfn, clonepfn, start, count) \
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paravirt_ops.alloc_pd_clone(pfn, clonepfn, start, count)
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#define paravirt_release_pd(pfn) paravirt_ops.release_pd(pfn)
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static inline void set_pte(pte_t *ptep, pte_t pteval)
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{
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paravirt_ops.set_pte(ptep, pteval);
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}
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static inline void set_pte_at(struct mm_struct *mm, u32 addr, pte_t *ptep, pte_t pteval)
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{
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paravirt_ops.set_pte_at(mm, addr, ptep, pteval);
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}
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static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
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{
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paravirt_ops.set_pmd(pmdp, pmdval);
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}
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static inline void pte_update(struct mm_struct *mm, u32 addr, pte_t *ptep)
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{
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paravirt_ops.pte_update(mm, addr, ptep);
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}
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static inline void pte_update_defer(struct mm_struct *mm, u32 addr, pte_t *ptep)
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{
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paravirt_ops.pte_update_defer(mm, addr, ptep);
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}
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#ifdef CONFIG_X86_PAE
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static inline void set_pte_atomic(pte_t *ptep, pte_t pteval)
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{
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paravirt_ops.set_pte_atomic(ptep, pteval);
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}
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static inline void set_pte_present(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
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{
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paravirt_ops.set_pte_present(mm, addr, ptep, pte);
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}
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static inline void set_pud(pud_t *pudp, pud_t pudval)
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{
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paravirt_ops.set_pud(pudp, pudval);
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}
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static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
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{
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paravirt_ops.pte_clear(mm, addr, ptep);
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}
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static inline void pmd_clear(pmd_t *pmdp)
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{
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paravirt_ops.pmd_clear(pmdp);
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}
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#endif
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/* Lazy mode for batching updates / context switch */
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#define PARAVIRT_LAZY_NONE 0
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#define PARAVIRT_LAZY_MMU 1
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#define PARAVIRT_LAZY_CPU 2
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#define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
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#define arch_enter_lazy_cpu_mode() paravirt_ops.set_lazy_mode(PARAVIRT_LAZY_CPU)
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#define arch_leave_lazy_cpu_mode() paravirt_ops.set_lazy_mode(PARAVIRT_LAZY_NONE)
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#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
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#define arch_enter_lazy_mmu_mode() paravirt_ops.set_lazy_mode(PARAVIRT_LAZY_MMU)
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#define arch_leave_lazy_mmu_mode() paravirt_ops.set_lazy_mode(PARAVIRT_LAZY_NONE)
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/* These all sit in the .parainstructions section to tell us what to patch. */
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struct paravirt_patch {
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u8 *instr; /* original instructions */
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u8 instrtype; /* type of this instruction */
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u8 len; /* length of original instruction */
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u16 clobbers; /* what registers you may clobber */
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};
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#define paravirt_alt(insn_string, typenum, clobber) \
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"771:\n\t" insn_string "\n" "772:\n" \
|
|
".pushsection .parainstructions,\"a\"\n" \
|
|
" .long 771b\n" \
|
|
" .byte " __stringify(typenum) "\n" \
|
|
" .byte 772b-771b\n" \
|
|
" .short " __stringify(clobber) "\n" \
|
|
".popsection"
|
|
|
|
static inline unsigned long __raw_local_save_flags(void)
|
|
{
|
|
unsigned long f;
|
|
|
|
__asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;"
|
|
"call *%1;"
|
|
"popl %%edx; popl %%ecx",
|
|
PARAVIRT_SAVE_FLAGS, CLBR_NONE)
|
|
: "=a"(f): "m"(paravirt_ops.save_fl)
|
|
: "memory", "cc");
|
|
return f;
|
|
}
|
|
|
|
static inline void raw_local_irq_restore(unsigned long f)
|
|
{
|
|
__asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;"
|
|
"call *%1;"
|
|
"popl %%edx; popl %%ecx",
|
|
PARAVIRT_RESTORE_FLAGS, CLBR_EAX)
|
|
: "=a"(f) : "m" (paravirt_ops.restore_fl), "0"(f)
|
|
: "memory", "cc");
|
|
}
|
|
|
|
static inline void raw_local_irq_disable(void)
|
|
{
|
|
__asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;"
|
|
"call *%0;"
|
|
"popl %%edx; popl %%ecx",
|
|
PARAVIRT_IRQ_DISABLE, CLBR_EAX)
|
|
: : "m" (paravirt_ops.irq_disable)
|
|
: "memory", "eax", "cc");
|
|
}
|
|
|
|
static inline void raw_local_irq_enable(void)
|
|
{
|
|
__asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;"
|
|
"call *%0;"
|
|
"popl %%edx; popl %%ecx",
|
|
PARAVIRT_IRQ_ENABLE, CLBR_EAX)
|
|
: : "m" (paravirt_ops.irq_enable)
|
|
: "memory", "eax", "cc");
|
|
}
|
|
|
|
static inline unsigned long __raw_local_irq_save(void)
|
|
{
|
|
unsigned long f;
|
|
|
|
__asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;"
|
|
"call *%1; pushl %%eax;"
|
|
"call *%2; popl %%eax;"
|
|
"popl %%edx; popl %%ecx",
|
|
PARAVIRT_SAVE_FLAGS_IRQ_DISABLE,
|
|
CLBR_NONE)
|
|
: "=a"(f)
|
|
: "m" (paravirt_ops.save_fl),
|
|
"m" (paravirt_ops.irq_disable)
|
|
: "memory", "cc");
|
|
return f;
|
|
}
|
|
|
|
#define CLI_STRING paravirt_alt("pushl %%ecx; pushl %%edx;" \
|
|
"call *paravirt_ops+%c[irq_disable];" \
|
|
"popl %%edx; popl %%ecx", \
|
|
PARAVIRT_IRQ_DISABLE, CLBR_EAX)
|
|
|
|
#define STI_STRING paravirt_alt("pushl %%ecx; pushl %%edx;" \
|
|
"call *paravirt_ops+%c[irq_enable];" \
|
|
"popl %%edx; popl %%ecx", \
|
|
PARAVIRT_IRQ_ENABLE, CLBR_EAX)
|
|
#define CLI_STI_CLOBBERS , "%eax"
|
|
#define CLI_STI_INPUT_ARGS \
|
|
, \
|
|
[irq_disable] "i" (offsetof(struct paravirt_ops, irq_disable)), \
|
|
[irq_enable] "i" (offsetof(struct paravirt_ops, irq_enable))
|
|
|
|
#else /* __ASSEMBLY__ */
|
|
|
|
#define PARA_PATCH(ptype, clobbers, ops) \
|
|
771:; \
|
|
ops; \
|
|
772:; \
|
|
.pushsection .parainstructions,"a"; \
|
|
.long 771b; \
|
|
.byte ptype; \
|
|
.byte 772b-771b; \
|
|
.short clobbers; \
|
|
.popsection
|
|
|
|
#define INTERRUPT_RETURN \
|
|
PARA_PATCH(PARAVIRT_INTERRUPT_RETURN, CLBR_ANY, \
|
|
jmp *%cs:paravirt_ops+PARAVIRT_iret)
|
|
|
|
#define DISABLE_INTERRUPTS(clobbers) \
|
|
PARA_PATCH(PARAVIRT_IRQ_DISABLE, clobbers, \
|
|
pushl %ecx; pushl %edx; \
|
|
call *paravirt_ops+PARAVIRT_irq_disable; \
|
|
popl %edx; popl %ecx) \
|
|
|
|
#define ENABLE_INTERRUPTS(clobbers) \
|
|
PARA_PATCH(PARAVIRT_IRQ_ENABLE, clobbers, \
|
|
pushl %ecx; pushl %edx; \
|
|
call *%cs:paravirt_ops+PARAVIRT_irq_enable; \
|
|
popl %edx; popl %ecx)
|
|
|
|
#define ENABLE_INTERRUPTS_SYSEXIT \
|
|
PARA_PATCH(PARAVIRT_STI_SYSEXIT, CLBR_ANY, \
|
|
jmp *%cs:paravirt_ops+PARAVIRT_irq_enable_sysexit)
|
|
|
|
#define GET_CR0_INTO_EAX \
|
|
call *paravirt_ops+PARAVIRT_read_cr0
|
|
|
|
#endif /* __ASSEMBLY__ */
|
|
#endif /* CONFIG_PARAVIRT */
|
|
#endif /* __ASM_PARAVIRT_H */
|