b1abb4d67f
Since the aic driver is now taught to speak in terms of the generic linux devices, we can now also dispense with the transport class get routines (since we update the parameters when the driver sees they change) and also plumb it into the spi transport transfer agreement reporting infrastructure. Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
959 lines
26 KiB
C
959 lines
26 KiB
C
/*
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* Adaptec AIC7xxx device driver for Linux.
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*
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* Copyright (c) 1994 John Aycock
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* The University of Calgary Department of Computer Science.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Copyright (c) 2000-2003 Adaptec Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* substantially similar to the "NO WARRANTY" disclaimer below
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* ("Disclaimer") and any redistribution must be conditioned upon
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* including a substantially similar Disclaimer requirement for further
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* binary redistribution.
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* 3. Neither the names of the above-listed copyright holders nor the names
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* of any contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") version 2 as published by the Free
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* Software Foundation.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGES.
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*
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* $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic7xxx_osm.h#151 $
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*
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*/
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#ifndef _AIC7XXX_LINUX_H_
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#define _AIC7XXX_LINUX_H_
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#include <linux/config.h>
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#include <linux/types.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <linux/ioport.h>
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#include <linux/pci.h>
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#include <linux/smp_lock.h>
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#include <linux/version.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <asm/byteorder.h>
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#include <asm/io.h>
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#include <scsi/scsi.h>
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#include <scsi/scsi_cmnd.h>
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#include <scsi/scsi_eh.h>
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#include <scsi/scsi_device.h>
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#include <scsi/scsi_host.h>
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#include <scsi/scsi_tcq.h>
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#include <scsi/scsi_transport.h>
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#include <scsi/scsi_transport_spi.h>
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/* Core SCSI definitions */
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#define AIC_LIB_PREFIX ahc
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/* Name space conflict with BSD queue macros */
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#ifdef LIST_HEAD
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#undef LIST_HEAD
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#endif
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#include "cam.h"
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#include "queue.h"
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#include "scsi_message.h"
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#include "aiclib.h"
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/*********************************** Debugging ********************************/
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#ifdef CONFIG_AIC7XXX_DEBUG_ENABLE
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#ifdef CONFIG_AIC7XXX_DEBUG_MASK
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#define AHC_DEBUG 1
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#define AHC_DEBUG_OPTS CONFIG_AIC7XXX_DEBUG_MASK
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#else
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/*
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* Compile in debugging code, but do not enable any printfs.
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*/
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#define AHC_DEBUG 1
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#endif
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/* No debugging code. */
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#endif
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/************************* Forward Declarations *******************************/
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struct ahc_softc;
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typedef struct pci_dev *ahc_dev_softc_t;
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typedef struct scsi_cmnd *ahc_io_ctx_t;
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/******************************* Byte Order ***********************************/
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#define ahc_htobe16(x) cpu_to_be16(x)
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#define ahc_htobe32(x) cpu_to_be32(x)
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#define ahc_htobe64(x) cpu_to_be64(x)
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#define ahc_htole16(x) cpu_to_le16(x)
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#define ahc_htole32(x) cpu_to_le32(x)
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#define ahc_htole64(x) cpu_to_le64(x)
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#define ahc_be16toh(x) be16_to_cpu(x)
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#define ahc_be32toh(x) be32_to_cpu(x)
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#define ahc_be64toh(x) be64_to_cpu(x)
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#define ahc_le16toh(x) le16_to_cpu(x)
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#define ahc_le32toh(x) le32_to_cpu(x)
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#define ahc_le64toh(x) le64_to_cpu(x)
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#ifndef LITTLE_ENDIAN
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#define LITTLE_ENDIAN 1234
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#endif
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#ifndef BIG_ENDIAN
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#define BIG_ENDIAN 4321
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#endif
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#ifndef BYTE_ORDER
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#if defined(__BIG_ENDIAN)
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#define BYTE_ORDER BIG_ENDIAN
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#endif
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#if defined(__LITTLE_ENDIAN)
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#define BYTE_ORDER LITTLE_ENDIAN
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#endif
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#endif /* BYTE_ORDER */
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/************************* Configuration Data *********************************/
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extern u_int aic7xxx_no_probe;
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extern u_int aic7xxx_allow_memio;
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extern int aic7xxx_detect_complete;
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extern struct scsi_host_template aic7xxx_driver_template;
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/***************************** Bus Space/DMA **********************************/
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typedef uint32_t bus_size_t;
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typedef enum {
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BUS_SPACE_MEMIO,
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BUS_SPACE_PIO
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} bus_space_tag_t;
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typedef union {
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u_long ioport;
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volatile uint8_t __iomem *maddr;
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} bus_space_handle_t;
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typedef struct bus_dma_segment
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{
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dma_addr_t ds_addr;
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bus_size_t ds_len;
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} bus_dma_segment_t;
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struct ahc_linux_dma_tag
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{
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bus_size_t alignment;
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bus_size_t boundary;
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bus_size_t maxsize;
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};
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typedef struct ahc_linux_dma_tag* bus_dma_tag_t;
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typedef dma_addr_t bus_dmamap_t;
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typedef int bus_dma_filter_t(void*, dma_addr_t);
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typedef void bus_dmamap_callback_t(void *, bus_dma_segment_t *, int, int);
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#define BUS_DMA_WAITOK 0x0
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#define BUS_DMA_NOWAIT 0x1
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#define BUS_DMA_ALLOCNOW 0x2
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#define BUS_DMA_LOAD_SEGS 0x4 /*
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* Argument is an S/G list not
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* a single buffer.
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*/
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#define BUS_SPACE_MAXADDR 0xFFFFFFFF
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#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
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#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
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int ahc_dma_tag_create(struct ahc_softc *, bus_dma_tag_t /*parent*/,
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bus_size_t /*alignment*/, bus_size_t /*boundary*/,
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dma_addr_t /*lowaddr*/, dma_addr_t /*highaddr*/,
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bus_dma_filter_t*/*filter*/, void */*filterarg*/,
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bus_size_t /*maxsize*/, int /*nsegments*/,
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bus_size_t /*maxsegsz*/, int /*flags*/,
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bus_dma_tag_t */*dma_tagp*/);
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void ahc_dma_tag_destroy(struct ahc_softc *, bus_dma_tag_t /*tag*/);
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int ahc_dmamem_alloc(struct ahc_softc *, bus_dma_tag_t /*dmat*/,
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void** /*vaddr*/, int /*flags*/,
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bus_dmamap_t* /*mapp*/);
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void ahc_dmamem_free(struct ahc_softc *, bus_dma_tag_t /*dmat*/,
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void* /*vaddr*/, bus_dmamap_t /*map*/);
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void ahc_dmamap_destroy(struct ahc_softc *, bus_dma_tag_t /*tag*/,
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bus_dmamap_t /*map*/);
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int ahc_dmamap_load(struct ahc_softc *ahc, bus_dma_tag_t /*dmat*/,
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bus_dmamap_t /*map*/, void * /*buf*/,
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bus_size_t /*buflen*/, bus_dmamap_callback_t *,
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void */*callback_arg*/, int /*flags*/);
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int ahc_dmamap_unload(struct ahc_softc *, bus_dma_tag_t, bus_dmamap_t);
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/*
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* Operations performed by ahc_dmamap_sync().
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*/
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#define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
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#define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
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#define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
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#define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
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/*
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* XXX
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* ahc_dmamap_sync is only used on buffers allocated with
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* the pci_alloc_consistent() API. Although I'm not sure how
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* this works on architectures with a write buffer, Linux does
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* not have an API to sync "coherent" memory. Perhaps we need
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* to do an mb()?
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*/
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#define ahc_dmamap_sync(ahc, dma_tag, dmamap, offset, len, op)
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/************************** Timer DataStructures ******************************/
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typedef struct timer_list ahc_timer_t;
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/********************************** Includes **********************************/
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#ifdef CONFIG_AIC7XXX_REG_PRETTY_PRINT
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#define AIC_DEBUG_REGISTERS 1
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#else
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#define AIC_DEBUG_REGISTERS 0
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#endif
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#include "aic7xxx.h"
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/***************************** Timer Facilities *******************************/
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#define ahc_timer_init init_timer
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#define ahc_timer_stop del_timer_sync
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typedef void ahc_linux_callback_t (u_long);
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static __inline void ahc_timer_reset(ahc_timer_t *timer, int usec,
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ahc_callback_t *func, void *arg);
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static __inline void ahc_scb_timer_reset(struct scb *scb, u_int usec);
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static __inline void
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ahc_timer_reset(ahc_timer_t *timer, int usec, ahc_callback_t *func, void *arg)
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{
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struct ahc_softc *ahc;
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ahc = (struct ahc_softc *)arg;
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del_timer(timer);
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timer->data = (u_long)arg;
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timer->expires = jiffies + (usec * HZ)/1000000;
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timer->function = (ahc_linux_callback_t*)func;
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add_timer(timer);
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}
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static __inline void
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ahc_scb_timer_reset(struct scb *scb, u_int usec)
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{
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mod_timer(&scb->io_ctx->eh_timeout, jiffies + (usec * HZ)/1000000);
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}
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/***************************** SMP support ************************************/
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#include <linux/spinlock.h>
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#define AIC7XXX_DRIVER_VERSION "6.2.36"
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/**************************** Front End Queues ********************************/
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/*
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* Data structure used to cast the Linux struct scsi_cmnd to something
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* that allows us to use the queue macros. The linux structure has
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* plenty of space to hold the links fields as required by the queue
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* macros, but the queue macors require them to have the correct type.
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*/
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struct ahc_cmd_internal {
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/* Area owned by the Linux scsi layer. */
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uint8_t private[offsetof(struct scsi_cmnd, SCp.Status)];
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union {
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STAILQ_ENTRY(ahc_cmd) ste;
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LIST_ENTRY(ahc_cmd) le;
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TAILQ_ENTRY(ahc_cmd) tqe;
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} links;
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uint32_t end;
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};
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struct ahc_cmd {
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union {
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struct ahc_cmd_internal icmd;
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struct scsi_cmnd scsi_cmd;
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} un;
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};
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#define acmd_icmd(cmd) ((cmd)->un.icmd)
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#define acmd_scsi_cmd(cmd) ((cmd)->un.scsi_cmd)
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#define acmd_links un.icmd.links
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/*************************** Device Data Structures ***************************/
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/*
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* A per probed device structure used to deal with some error recovery
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* scenarios that the Linux mid-layer code just doesn't know how to
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* handle. The structure allocated for a device only becomes persistent
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* after a successfully completed inquiry command to the target when
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* that inquiry data indicates a lun is present.
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*/
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TAILQ_HEAD(ahc_busyq, ahc_cmd);
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typedef enum {
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AHC_DEV_FREEZE_TIL_EMPTY = 0x02, /* Freeze queue until active == 0 */
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AHC_DEV_Q_BASIC = 0x10, /* Allow basic device queuing */
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AHC_DEV_Q_TAGGED = 0x20, /* Allow full SCSI2 command queueing */
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AHC_DEV_PERIODIC_OTAG = 0x40, /* Send OTAG to prevent starvation */
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} ahc_linux_dev_flags;
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struct ahc_linux_target;
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struct ahc_linux_device {
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/*
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* The number of transactions currently
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* queued to the device.
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*/
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int active;
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/*
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* The currently allowed number of
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* transactions that can be queued to
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* the device. Must be signed for
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* conversion from tagged to untagged
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* mode where the device may have more
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* than one outstanding active transaction.
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*/
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int openings;
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/*
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* A positive count indicates that this
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* device's queue is halted.
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*/
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u_int qfrozen;
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/*
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* Cumulative command counter.
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*/
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u_long commands_issued;
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/*
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* The number of tagged transactions when
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* running at our current opening level
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* that have been successfully received by
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* this device since the last QUEUE FULL.
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*/
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u_int tag_success_count;
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#define AHC_TAG_SUCCESS_INTERVAL 50
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ahc_linux_dev_flags flags;
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/*
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* The high limit for the tags variable.
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*/
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u_int maxtags;
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/*
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* The computed number of tags outstanding
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* at the time of the last QUEUE FULL event.
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*/
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u_int tags_on_last_queuefull;
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/*
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* How many times we have seen a queue full
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* with the same number of tags. This is used
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* to stop our adaptive queue depth algorithm
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* on devices with a fixed number of tags.
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*/
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u_int last_queuefull_same_count;
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#define AHC_LOCK_TAGS_COUNT 50
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/*
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* How many transactions have been queued
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* without the device going idle. We use
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* this statistic to determine when to issue
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* an ordered tag to prevent transaction
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* starvation. This statistic is only updated
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* if the AHC_DEV_PERIODIC_OTAG flag is set
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* on this device.
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*/
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u_int commands_since_idle_or_otag;
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#define AHC_OTAG_THRESH 500
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};
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struct ahc_linux_target {
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struct scsi_device *sdev[AHC_NUM_LUNS];
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struct ahc_transinfo last_tinfo;
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struct ahc_softc *ahc;
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};
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/********************* Definitions Required by the Core ***********************/
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/*
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* Number of SG segments we require. So long as the S/G segments for
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* a particular transaction are allocated in a physically contiguous
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* manner and are allocated below 4GB, the number of S/G segments is
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* unrestricted.
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*/
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#define AHC_NSEG 128
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/*
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* Per-SCB OSM storage.
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*/
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struct scb_platform_data {
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struct ahc_linux_device *dev;
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dma_addr_t buf_busaddr;
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uint32_t xfer_len;
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uint32_t sense_resid; /* Auto-Sense residual */
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};
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/*
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* Define a structure used for each host adapter. All members are
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* aligned on a boundary >= the size of the member to honor the
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* alignment restrictions of the various platforms supported by
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* this driver.
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*/
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struct ahc_platform_data {
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/*
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* Fields accessed from interrupt context.
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*/
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struct scsi_target *starget[AHC_NUM_TARGETS];
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spinlock_t spin_lock;
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u_int qfrozen;
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struct timer_list reset_timer;
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struct semaphore eh_sem;
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struct Scsi_Host *host; /* pointer to scsi host */
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#define AHC_LINUX_NOIRQ ((uint32_t)~0)
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uint32_t irq; /* IRQ for this adapter */
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uint32_t bios_address;
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uint32_t mem_busaddr; /* Mem Base Addr */
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#define AHC_UP_EH_SEMAPHORE 0x1
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uint32_t flags;
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};
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/************************** OS Utility Wrappers *******************************/
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#define printf printk
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#define M_NOWAIT GFP_ATOMIC
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#define M_WAITOK 0
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#define malloc(size, type, flags) kmalloc(size, flags)
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#define free(ptr, type) kfree(ptr)
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static __inline void ahc_delay(long);
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static __inline void
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ahc_delay(long usec)
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{
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/*
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* udelay on Linux can have problems for
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* multi-millisecond waits. Wait at most
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* 1024us per call.
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*/
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while (usec > 0) {
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udelay(usec % 1024);
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usec -= 1024;
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}
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}
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/***************************** Low Level I/O **********************************/
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static __inline uint8_t ahc_inb(struct ahc_softc * ahc, long port);
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static __inline void ahc_outb(struct ahc_softc * ahc, long port, uint8_t val);
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static __inline void ahc_outsb(struct ahc_softc * ahc, long port,
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uint8_t *, int count);
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static __inline void ahc_insb(struct ahc_softc * ahc, long port,
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|
uint8_t *, int count);
|
|
|
|
static __inline uint8_t
|
|
ahc_inb(struct ahc_softc * ahc, long port)
|
|
{
|
|
uint8_t x;
|
|
|
|
if (ahc->tag == BUS_SPACE_MEMIO) {
|
|
x = readb(ahc->bsh.maddr + port);
|
|
} else {
|
|
x = inb(ahc->bsh.ioport + port);
|
|
}
|
|
mb();
|
|
return (x);
|
|
}
|
|
|
|
static __inline void
|
|
ahc_outb(struct ahc_softc * ahc, long port, uint8_t val)
|
|
{
|
|
if (ahc->tag == BUS_SPACE_MEMIO) {
|
|
writeb(val, ahc->bsh.maddr + port);
|
|
} else {
|
|
outb(val, ahc->bsh.ioport + port);
|
|
}
|
|
mb();
|
|
}
|
|
|
|
static __inline void
|
|
ahc_outsb(struct ahc_softc * ahc, long port, uint8_t *array, int count)
|
|
{
|
|
int i;
|
|
|
|
/*
|
|
* There is probably a more efficient way to do this on Linux
|
|
* but we don't use this for anything speed critical and this
|
|
* should work.
|
|
*/
|
|
for (i = 0; i < count; i++)
|
|
ahc_outb(ahc, port, *array++);
|
|
}
|
|
|
|
static __inline void
|
|
ahc_insb(struct ahc_softc * ahc, long port, uint8_t *array, int count)
|
|
{
|
|
int i;
|
|
|
|
/*
|
|
* There is probably a more efficient way to do this on Linux
|
|
* but we don't use this for anything speed critical and this
|
|
* should work.
|
|
*/
|
|
for (i = 0; i < count; i++)
|
|
*array++ = ahc_inb(ahc, port);
|
|
}
|
|
|
|
/**************************** Initialization **********************************/
|
|
int ahc_linux_register_host(struct ahc_softc *,
|
|
struct scsi_host_template *);
|
|
|
|
uint64_t ahc_linux_get_memsize(void);
|
|
|
|
/*************************** Pretty Printing **********************************/
|
|
struct info_str {
|
|
char *buffer;
|
|
int length;
|
|
off_t offset;
|
|
int pos;
|
|
};
|
|
|
|
void ahc_format_transinfo(struct info_str *info,
|
|
struct ahc_transinfo *tinfo);
|
|
|
|
/******************************** Locking *************************************/
|
|
/* Lock protecting internal data structures */
|
|
static __inline void ahc_lockinit(struct ahc_softc *);
|
|
static __inline void ahc_lock(struct ahc_softc *, unsigned long *flags);
|
|
static __inline void ahc_unlock(struct ahc_softc *, unsigned long *flags);
|
|
|
|
/* Lock held during ahc_list manipulation and ahc softc frees */
|
|
extern spinlock_t ahc_list_spinlock;
|
|
static __inline void ahc_list_lockinit(void);
|
|
static __inline void ahc_list_lock(unsigned long *flags);
|
|
static __inline void ahc_list_unlock(unsigned long *flags);
|
|
|
|
static __inline void
|
|
ahc_lockinit(struct ahc_softc *ahc)
|
|
{
|
|
spin_lock_init(&ahc->platform_data->spin_lock);
|
|
}
|
|
|
|
static __inline void
|
|
ahc_lock(struct ahc_softc *ahc, unsigned long *flags)
|
|
{
|
|
spin_lock_irqsave(&ahc->platform_data->spin_lock, *flags);
|
|
}
|
|
|
|
static __inline void
|
|
ahc_unlock(struct ahc_softc *ahc, unsigned long *flags)
|
|
{
|
|
spin_unlock_irqrestore(&ahc->platform_data->spin_lock, *flags);
|
|
}
|
|
|
|
static __inline void
|
|
ahc_list_lockinit(void)
|
|
{
|
|
spin_lock_init(&ahc_list_spinlock);
|
|
}
|
|
|
|
static __inline void
|
|
ahc_list_lock(unsigned long *flags)
|
|
{
|
|
spin_lock_irqsave(&ahc_list_spinlock, *flags);
|
|
}
|
|
|
|
static __inline void
|
|
ahc_list_unlock(unsigned long *flags)
|
|
{
|
|
spin_unlock_irqrestore(&ahc_list_spinlock, *flags);
|
|
}
|
|
|
|
/******************************* PCI Definitions ******************************/
|
|
/*
|
|
* PCIM_xxx: mask to locate subfield in register
|
|
* PCIR_xxx: config register offset
|
|
* PCIC_xxx: device class
|
|
* PCIS_xxx: device subclass
|
|
* PCIP_xxx: device programming interface
|
|
* PCIV_xxx: PCI vendor ID (only required to fixup ancient devices)
|
|
* PCID_xxx: device ID
|
|
*/
|
|
#define PCIR_DEVVENDOR 0x00
|
|
#define PCIR_VENDOR 0x00
|
|
#define PCIR_DEVICE 0x02
|
|
#define PCIR_COMMAND 0x04
|
|
#define PCIM_CMD_PORTEN 0x0001
|
|
#define PCIM_CMD_MEMEN 0x0002
|
|
#define PCIM_CMD_BUSMASTEREN 0x0004
|
|
#define PCIM_CMD_MWRICEN 0x0010
|
|
#define PCIM_CMD_PERRESPEN 0x0040
|
|
#define PCIM_CMD_SERRESPEN 0x0100
|
|
#define PCIR_STATUS 0x06
|
|
#define PCIR_REVID 0x08
|
|
#define PCIR_PROGIF 0x09
|
|
#define PCIR_SUBCLASS 0x0a
|
|
#define PCIR_CLASS 0x0b
|
|
#define PCIR_CACHELNSZ 0x0c
|
|
#define PCIR_LATTIMER 0x0d
|
|
#define PCIR_HEADERTYPE 0x0e
|
|
#define PCIM_MFDEV 0x80
|
|
#define PCIR_BIST 0x0f
|
|
#define PCIR_CAP_PTR 0x34
|
|
|
|
/* config registers for header type 0 devices */
|
|
#define PCIR_MAPS 0x10
|
|
#define PCIR_SUBVEND_0 0x2c
|
|
#define PCIR_SUBDEV_0 0x2e
|
|
|
|
extern struct pci_driver aic7xxx_pci_driver;
|
|
|
|
typedef enum
|
|
{
|
|
AHC_POWER_STATE_D0,
|
|
AHC_POWER_STATE_D1,
|
|
AHC_POWER_STATE_D2,
|
|
AHC_POWER_STATE_D3
|
|
} ahc_power_state;
|
|
|
|
/**************************** VL/EISA Routines ********************************/
|
|
#ifdef CONFIG_EISA
|
|
extern uint32_t aic7xxx_probe_eisa_vl;
|
|
int ahc_linux_eisa_init(void);
|
|
void ahc_linux_eisa_exit(void);
|
|
int aic7770_map_registers(struct ahc_softc *ahc,
|
|
u_int port);
|
|
int aic7770_map_int(struct ahc_softc *ahc, u_int irq);
|
|
#else
|
|
static inline int ahc_linux_eisa_init(void) {
|
|
return -ENODEV;
|
|
}
|
|
static inline void ahc_linux_eisa_exit(void) {
|
|
}
|
|
#endif
|
|
|
|
/******************************* PCI Routines *********************************/
|
|
#ifdef CONFIG_PCI
|
|
int ahc_linux_pci_init(void);
|
|
void ahc_linux_pci_exit(void);
|
|
int ahc_pci_map_registers(struct ahc_softc *ahc);
|
|
int ahc_pci_map_int(struct ahc_softc *ahc);
|
|
|
|
static __inline uint32_t ahc_pci_read_config(ahc_dev_softc_t pci,
|
|
int reg, int width);
|
|
|
|
static __inline uint32_t
|
|
ahc_pci_read_config(ahc_dev_softc_t pci, int reg, int width)
|
|
{
|
|
switch (width) {
|
|
case 1:
|
|
{
|
|
uint8_t retval;
|
|
|
|
pci_read_config_byte(pci, reg, &retval);
|
|
return (retval);
|
|
}
|
|
case 2:
|
|
{
|
|
uint16_t retval;
|
|
pci_read_config_word(pci, reg, &retval);
|
|
return (retval);
|
|
}
|
|
case 4:
|
|
{
|
|
uint32_t retval;
|
|
pci_read_config_dword(pci, reg, &retval);
|
|
return (retval);
|
|
}
|
|
default:
|
|
panic("ahc_pci_read_config: Read size too big");
|
|
/* NOTREACHED */
|
|
return (0);
|
|
}
|
|
}
|
|
|
|
static __inline void ahc_pci_write_config(ahc_dev_softc_t pci,
|
|
int reg, uint32_t value,
|
|
int width);
|
|
|
|
static __inline void
|
|
ahc_pci_write_config(ahc_dev_softc_t pci, int reg, uint32_t value, int width)
|
|
{
|
|
switch (width) {
|
|
case 1:
|
|
pci_write_config_byte(pci, reg, value);
|
|
break;
|
|
case 2:
|
|
pci_write_config_word(pci, reg, value);
|
|
break;
|
|
case 4:
|
|
pci_write_config_dword(pci, reg, value);
|
|
break;
|
|
default:
|
|
panic("ahc_pci_write_config: Write size too big");
|
|
/* NOTREACHED */
|
|
}
|
|
}
|
|
|
|
static __inline int ahc_get_pci_function(ahc_dev_softc_t);
|
|
static __inline int
|
|
ahc_get_pci_function(ahc_dev_softc_t pci)
|
|
{
|
|
return (PCI_FUNC(pci->devfn));
|
|
}
|
|
|
|
static __inline int ahc_get_pci_slot(ahc_dev_softc_t);
|
|
static __inline int
|
|
ahc_get_pci_slot(ahc_dev_softc_t pci)
|
|
{
|
|
return (PCI_SLOT(pci->devfn));
|
|
}
|
|
|
|
static __inline int ahc_get_pci_bus(ahc_dev_softc_t);
|
|
static __inline int
|
|
ahc_get_pci_bus(ahc_dev_softc_t pci)
|
|
{
|
|
return (pci->bus->number);
|
|
}
|
|
#else
|
|
static inline int ahc_linux_pci_init(void) {
|
|
return 0;
|
|
}
|
|
static inline void ahc_linux_pci_exit(void) {
|
|
}
|
|
#endif
|
|
|
|
static __inline void ahc_flush_device_writes(struct ahc_softc *);
|
|
static __inline void
|
|
ahc_flush_device_writes(struct ahc_softc *ahc)
|
|
{
|
|
/* XXX Is this sufficient for all architectures??? */
|
|
ahc_inb(ahc, INTSTAT);
|
|
}
|
|
|
|
/**************************** Proc FS Support *********************************/
|
|
int ahc_linux_proc_info(struct Scsi_Host *, char *, char **,
|
|
off_t, int, int);
|
|
|
|
/*************************** Domain Validation ********************************/
|
|
/*********************** Transaction Access Wrappers *************************/
|
|
static __inline void ahc_cmd_set_transaction_status(struct scsi_cmnd *, uint32_t);
|
|
static __inline void ahc_set_transaction_status(struct scb *, uint32_t);
|
|
static __inline void ahc_cmd_set_scsi_status(struct scsi_cmnd *, uint32_t);
|
|
static __inline void ahc_set_scsi_status(struct scb *, uint32_t);
|
|
static __inline uint32_t ahc_cmd_get_transaction_status(struct scsi_cmnd *cmd);
|
|
static __inline uint32_t ahc_get_transaction_status(struct scb *);
|
|
static __inline uint32_t ahc_cmd_get_scsi_status(struct scsi_cmnd *cmd);
|
|
static __inline uint32_t ahc_get_scsi_status(struct scb *);
|
|
static __inline void ahc_set_transaction_tag(struct scb *, int, u_int);
|
|
static __inline u_long ahc_get_transfer_length(struct scb *);
|
|
static __inline int ahc_get_transfer_dir(struct scb *);
|
|
static __inline void ahc_set_residual(struct scb *, u_long);
|
|
static __inline void ahc_set_sense_residual(struct scb *scb, u_long resid);
|
|
static __inline u_long ahc_get_residual(struct scb *);
|
|
static __inline u_long ahc_get_sense_residual(struct scb *);
|
|
static __inline int ahc_perform_autosense(struct scb *);
|
|
static __inline uint32_t ahc_get_sense_bufsize(struct ahc_softc *,
|
|
struct scb *);
|
|
static __inline void ahc_notify_xfer_settings_change(struct ahc_softc *,
|
|
struct ahc_devinfo *);
|
|
static __inline void ahc_platform_scb_free(struct ahc_softc *ahc,
|
|
struct scb *scb);
|
|
static __inline void ahc_freeze_scb(struct scb *scb);
|
|
|
|
static __inline
|
|
void ahc_cmd_set_transaction_status(struct scsi_cmnd *cmd, uint32_t status)
|
|
{
|
|
cmd->result &= ~(CAM_STATUS_MASK << 16);
|
|
cmd->result |= status << 16;
|
|
}
|
|
|
|
static __inline
|
|
void ahc_set_transaction_status(struct scb *scb, uint32_t status)
|
|
{
|
|
ahc_cmd_set_transaction_status(scb->io_ctx,status);
|
|
}
|
|
|
|
static __inline
|
|
void ahc_cmd_set_scsi_status(struct scsi_cmnd *cmd, uint32_t status)
|
|
{
|
|
cmd->result &= ~0xFFFF;
|
|
cmd->result |= status;
|
|
}
|
|
|
|
static __inline
|
|
void ahc_set_scsi_status(struct scb *scb, uint32_t status)
|
|
{
|
|
ahc_cmd_set_scsi_status(scb->io_ctx, status);
|
|
}
|
|
|
|
static __inline
|
|
uint32_t ahc_cmd_get_transaction_status(struct scsi_cmnd *cmd)
|
|
{
|
|
return ((cmd->result >> 16) & CAM_STATUS_MASK);
|
|
}
|
|
|
|
static __inline
|
|
uint32_t ahc_get_transaction_status(struct scb *scb)
|
|
{
|
|
return (ahc_cmd_get_transaction_status(scb->io_ctx));
|
|
}
|
|
|
|
static __inline
|
|
uint32_t ahc_cmd_get_scsi_status(struct scsi_cmnd *cmd)
|
|
{
|
|
return (cmd->result & 0xFFFF);
|
|
}
|
|
|
|
static __inline
|
|
uint32_t ahc_get_scsi_status(struct scb *scb)
|
|
{
|
|
return (ahc_cmd_get_scsi_status(scb->io_ctx));
|
|
}
|
|
|
|
static __inline
|
|
void ahc_set_transaction_tag(struct scb *scb, int enabled, u_int type)
|
|
{
|
|
/*
|
|
* Nothing to do for linux as the incoming transaction
|
|
* has no concept of tag/non tagged, etc.
|
|
*/
|
|
}
|
|
|
|
static __inline
|
|
u_long ahc_get_transfer_length(struct scb *scb)
|
|
{
|
|
return (scb->platform_data->xfer_len);
|
|
}
|
|
|
|
static __inline
|
|
int ahc_get_transfer_dir(struct scb *scb)
|
|
{
|
|
return (scb->io_ctx->sc_data_direction);
|
|
}
|
|
|
|
static __inline
|
|
void ahc_set_residual(struct scb *scb, u_long resid)
|
|
{
|
|
scb->io_ctx->resid = resid;
|
|
}
|
|
|
|
static __inline
|
|
void ahc_set_sense_residual(struct scb *scb, u_long resid)
|
|
{
|
|
scb->platform_data->sense_resid = resid;
|
|
}
|
|
|
|
static __inline
|
|
u_long ahc_get_residual(struct scb *scb)
|
|
{
|
|
return (scb->io_ctx->resid);
|
|
}
|
|
|
|
static __inline
|
|
u_long ahc_get_sense_residual(struct scb *scb)
|
|
{
|
|
return (scb->platform_data->sense_resid);
|
|
}
|
|
|
|
static __inline
|
|
int ahc_perform_autosense(struct scb *scb)
|
|
{
|
|
/*
|
|
* We always perform autosense in Linux.
|
|
* On other platforms this is set on a
|
|
* per-transaction basis.
|
|
*/
|
|
return (1);
|
|
}
|
|
|
|
static __inline uint32_t
|
|
ahc_get_sense_bufsize(struct ahc_softc *ahc, struct scb *scb)
|
|
{
|
|
return (sizeof(struct scsi_sense_data));
|
|
}
|
|
|
|
static __inline void
|
|
ahc_notify_xfer_settings_change(struct ahc_softc *ahc,
|
|
struct ahc_devinfo *devinfo)
|
|
{
|
|
/* Nothing to do here for linux */
|
|
}
|
|
|
|
static __inline void
|
|
ahc_platform_scb_free(struct ahc_softc *ahc, struct scb *scb)
|
|
{
|
|
ahc->flags &= ~AHC_RESOURCE_SHORTAGE;
|
|
}
|
|
|
|
int ahc_platform_alloc(struct ahc_softc *ahc, void *platform_arg);
|
|
void ahc_platform_free(struct ahc_softc *ahc);
|
|
void ahc_platform_freeze_devq(struct ahc_softc *ahc, struct scb *scb);
|
|
|
|
static __inline void
|
|
ahc_freeze_scb(struct scb *scb)
|
|
{
|
|
if ((scb->io_ctx->result & (CAM_DEV_QFRZN << 16)) == 0) {
|
|
scb->io_ctx->result |= CAM_DEV_QFRZN << 16;
|
|
scb->platform_data->dev->qfrozen++;
|
|
}
|
|
}
|
|
|
|
void ahc_platform_set_tags(struct ahc_softc *ahc,
|
|
struct ahc_devinfo *devinfo, ahc_queue_alg);
|
|
int ahc_platform_abort_scbs(struct ahc_softc *ahc, int target,
|
|
char channel, int lun, u_int tag,
|
|
role_t role, uint32_t status);
|
|
irqreturn_t
|
|
ahc_linux_isr(int irq, void *dev_id, struct pt_regs * regs);
|
|
void ahc_platform_flushwork(struct ahc_softc *ahc);
|
|
int ahc_softc_comp(struct ahc_softc *, struct ahc_softc *);
|
|
void ahc_done(struct ahc_softc*, struct scb*);
|
|
void ahc_send_async(struct ahc_softc *, char channel,
|
|
u_int target, u_int lun, ac_code, void *);
|
|
void ahc_print_path(struct ahc_softc *, struct scb *);
|
|
void ahc_platform_dump_card_state(struct ahc_softc *ahc);
|
|
|
|
#ifdef CONFIG_PCI
|
|
#define AHC_PCI_CONFIG 1
|
|
#else
|
|
#define AHC_PCI_CONFIG 0
|
|
#endif
|
|
#define bootverbose aic7xxx_verbose
|
|
extern u_int aic7xxx_verbose;
|
|
#endif /* _AIC7XXX_LINUX_H_ */
|