b1526421ea
cx18: Create cx18_ specific wrappers for all pci mmio accessesors. This is a first step in instrumenting all CX23418 PCI bus IO, to debug problems with accessing the CX23418's PCI memory mapped IO. Signed-off-by: Andy Walls <awalls@radix.net> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
70 lines
2.8 KiB
C
70 lines
2.8 KiB
C
/*
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* cx18 driver PCI memory mapped IO access routines
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*
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* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
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* Copyright (C) 2008 Andy Walls <awalls@radix.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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* 02111-1307 USA
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*/
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#ifndef CX18_IO_H
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#define CX18_IO_H
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#include "cx18-driver.h"
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/* This is a PCI post thing, where if the pci register is not read, then
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the write doesn't always take effect right away. By reading back the
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register any pending PCI writes will be performed (in order), and so
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you can be sure that the writes are guaranteed to be done.
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Rarely needed, only in some timing sensitive cases.
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Apparently if this is not done some motherboards seem
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to kill the firmware and get into the broken state until computer is
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rebooted. */
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u32 cx18_write_sync(struct cx18 *cx, u32 val, void __iomem *addr);
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void cx18_writel(struct cx18 *cx, u32 val, void __iomem *addr);
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u32 cx18_readl(struct cx18 *cx, const void __iomem *addr);
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/* No endiannes conversion calls */
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void cx18_raw_writel(struct cx18 *cx, u32 val, void __iomem *addr);
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u32 cx18_raw_readl(struct cx18 *cx, const void __iomem *addr);
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/* Access "register" region of CX23418 memory mapped I/O */
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u32 cx18_read_reg(struct cx18 *cx, u32 reg);
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void cx18_write_reg(struct cx18 *cx, u32 val, u32 reg);
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u32 cx18_write_reg_sync(struct cx18 *cx, u32 val, u32 reg);
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/* Access "encoder memory" region of CX23418 memory mapped I/O */
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u32 cx18_read_enc(struct cx18 *cx, u32 addr);
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void cx18_write_enc(struct cx18 *cx, u32 val, u32 addr);
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u32 cx18_write_enc_sync(struct cx18 *cx, u32 val, u32 addr);
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void cx18_memcpy_fromio(struct cx18 *cx, void *to,
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const void __iomem *from, unsigned int len);
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void cx18_memset_io(struct cx18 *cx, void __iomem *addr, int val, size_t count);
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void cx18_sw1_irq_enable(struct cx18 *cx, u32 val);
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void cx18_sw1_irq_disable(struct cx18 *cx, u32 val);
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void cx18_sw2_irq_enable(struct cx18 *cx, u32 val);
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void cx18_sw2_irq_disable(struct cx18 *cx, u32 val);
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void cx18_setup_page(struct cx18 *cx, u32 addr);
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/* Tries to recover from the CX23418 responding improperly on the PCI bus */
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int cx18_pci_try_recover(struct cx18 *cx);
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#endif /* CX18_IO_H */
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