b08bb35d1a
SDCC uses an asynchronous FIFOs for data synchronization (one for TX and one for RX). For any error when DPSM (Data path state machine) is involved the transfer is terminated with the remaining data stuck inside FIFOs. Reset the controller in case of data errors to ensure that any left over data in FIFOs is flushed out and DPSM is in good state. The following problems are observed without this reset functionality - 1. After the card is removed in an unsafe way (removed when there is an on going data transfer), the card will not be detected upon its next insertion. This is because the controller wouldn't respond to few initialization commands. 2. When an error occurs for a data transfer in non-DMA mode, sometimes we get spurious PIO interrupt after the request is processed. Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> |
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