af6521ea8a
1. UCC1's RX_DV pin is 16, not 15; 2. UCC1's phy is at 0x7, not 0x1. Schematics says 0x7, and recent u-boot also using 0x7. 3. Use gianfar's (eTSEC) mdio bus. This is hardware default setup. 4. tx-clock should be CLK16 (GE125, PB31); 5. phy-connection-type is RGMII-ID; Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
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boot | ||
configs | ||
kernel | ||
lib | ||
math-emu | ||
mm | ||
oprofile | ||
platforms | ||
sysdev | ||
xmon | ||
.gitignore | ||
Kconfig | ||
Kconfig.debug | ||
Makefile |