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linux/drivers/net/wwan/t7xx/t7xx_hif_dpmaif_tx.h
Haijun Liu d642b012df net: wwan: t7xx: Add data path interface
Data Path Modem AP Interface (DPMAIF) HIF layer provides methods
for initialization, ISR, control and event handling of TX/RX flows.

DPMAIF TX
Exposes the 'dmpaif_tx_send_skb' function which can be used by the
network device to transmit packets.
The uplink data management uses a Descriptor Ring Buffer (DRB).
First DRB entry is a message type that will be followed by 1 or more
normal DRB entries. Message type DRB will hold the skb information
and each normal DRB entry holds a pointer to the skb payload.

DPMAIF RX
The downlink buffer management uses Buffer Address Table (BAT) and
Packet Information Table (PIT) rings.
The BAT ring holds the address of skb data buffer for the HW to use,
while the PIT contains metadata about a whole network packet including
a reference to the BAT entry holding the data buffer address.
The driver reads the PIT and BAT entries written by the modem, when
reaching a threshold, the driver will reload the PIT and BAT rings.

Signed-off-by: Haijun Liu <haijun.liu@mediatek.com>
Signed-off-by: Chandrashekar Devegowda <chandrashekar.devegowda@intel.com>
Co-developed-by: Ricardo Martinez <ricardo.martinez@linux.intel.com>
Signed-off-by: Ricardo Martinez <ricardo.martinez@linux.intel.com>
Reviewed-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2022-05-09 10:51:59 +01:00

79 lines
2.0 KiB
C

/* SPDX-License-Identifier: GPL-2.0-only
*
* Copyright (c) 2021, MediaTek Inc.
* Copyright (c) 2021-2022, Intel Corporation.
*
* Authors:
* Haijun Liu <haijun.liu@mediatek.com>
* Eliot Lee <eliot.lee@intel.com>
* Ricardo Martinez <ricardo.martinez@linux.intel.com>
*
* Contributors:
* Amir Hanania <amir.hanania@intel.com>
* Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com>
* Moises Veleta <moises.veleta@intel.com>
* Sreehari Kancharla <sreehari.kancharla@intel.com>
*/
#ifndef __T7XX_HIF_DPMA_TX_H__
#define __T7XX_HIF_DPMA_TX_H__
#include <linux/bits.h>
#include <linux/skbuff.h>
#include <linux/types.h>
#include "t7xx_hif_dpmaif.h"
#define DPMAIF_TX_DEFAULT_QUEUE 0
struct dpmaif_drb {
__le32 header;
union {
struct {
__le32 data_addr_l;
__le32 data_addr_h;
} pd;
struct {
__le32 msg_hdr;
__le32 reserved1;
} msg;
};
__le32 reserved2;
};
/* Header fields */
#define DRB_HDR_DATA_LEN GENMASK(31, 16)
#define DRB_HDR_RESERVED GENMASK(15, 3)
#define DRB_HDR_CONT BIT(2)
#define DRB_HDR_DTYP GENMASK(1, 0)
#define DRB_MSG_DW2_RES GENMASK(31, 30)
#define DRB_MSG_L4_CHK BIT(29)
#define DRB_MSG_IP_CHK BIT(28)
#define DRB_MSG_RESERVED BIT(27)
#define DRB_MSG_NETWORK_TYPE GENMASK(26, 24)
#define DRB_MSG_CHANNEL_ID GENMASK(23, 16)
#define DRB_MSG_COUNT_L GENMASK(15, 0)
struct dpmaif_drb_skb {
struct sk_buff *skb;
dma_addr_t bus_addr;
unsigned int data_len;
u16 index:13;
u16 is_msg:1;
u16 is_frag:1;
u16 is_last:1;
};
int t7xx_dpmaif_tx_send_skb(struct dpmaif_ctrl *dpmaif_ctrl, unsigned int txq_number,
struct sk_buff *skb);
void t7xx_dpmaif_tx_thread_rel(struct dpmaif_ctrl *dpmaif_ctrl);
int t7xx_dpmaif_tx_thread_init(struct dpmaif_ctrl *dpmaif_ctrl);
void t7xx_dpmaif_txq_free(struct dpmaif_tx_queue *txq);
void t7xx_dpmaif_irq_tx_done(struct dpmaif_ctrl *dpmaif_ctrl, unsigned int que_mask);
int t7xx_dpmaif_txq_init(struct dpmaif_tx_queue *txq);
void t7xx_dpmaif_tx_stop(struct dpmaif_ctrl *dpmaif_ctrl);
void t7xx_dpmaif_tx_clear(struct dpmaif_ctrl *dpmaif_ctrl);
#endif /* __T7XX_HIF_DPMA_TX_H__ */