42b0a5e691
The commit9b4b7c1f9f("RDMA/rxe: Add workqueue support for rxe tasks") removed tasklets and replaced them with a workqueue, but relevant comments are still remaining in the source code. Fixes:9b4b7c1f9f("RDMA/rxe: Add workqueue support for rxe tasks") Link: https://lore.kernel.org/r/20230518070027.942715-1-matsuda-daisuke@fujitsu.com Signed-off-by: Daisuke Matsuda <matsuda-daisuke@fujitsu.com> Reviewed-by: Bob Pearson <rpearsonhpe@gmail.com> Acked-by: Zhu Yanjun <zyjzyj2000@gmail.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
157 lines
4.1 KiB
C
157 lines
4.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
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/*
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* Copyright (c) 2016 Mellanox Technologies Ltd. All rights reserved.
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* Copyright (c) 2015 System Fabric Works, Inc. All rights reserved.
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*/
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#ifndef RXE_PARAM_H
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#define RXE_PARAM_H
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#include <uapi/rdma/rdma_user_rxe.h>
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#define DEFAULT_MAX_VALUE (1 << 20)
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static inline enum ib_mtu rxe_mtu_int_to_enum(int mtu)
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{
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if (mtu < 256)
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return 0;
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else if (mtu < 512)
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return IB_MTU_256;
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else if (mtu < 1024)
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return IB_MTU_512;
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else if (mtu < 2048)
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return IB_MTU_1024;
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else if (mtu < 4096)
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return IB_MTU_2048;
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else
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return IB_MTU_4096;
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}
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/* Find the IB mtu for a given network MTU. */
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static inline enum ib_mtu eth_mtu_int_to_enum(int mtu)
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{
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mtu -= RXE_MAX_HDR_LENGTH;
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return rxe_mtu_int_to_enum(mtu);
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}
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/* default/initial rxe device parameter settings */
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enum rxe_device_param {
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RXE_MAX_MR_SIZE = -1ull,
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RXE_PAGE_SIZE_CAP = 0xfffff000,
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RXE_MAX_QP_WR = DEFAULT_MAX_VALUE,
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RXE_DEVICE_CAP_FLAGS = IB_DEVICE_BAD_PKEY_CNTR
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| IB_DEVICE_BAD_QKEY_CNTR
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| IB_DEVICE_AUTO_PATH_MIG
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| IB_DEVICE_CHANGE_PHY_PORT
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| IB_DEVICE_UD_AV_PORT_ENFORCE
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| IB_DEVICE_PORT_ACTIVE_EVENT
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| IB_DEVICE_SYS_IMAGE_GUID
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| IB_DEVICE_RC_RNR_NAK_GEN
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| IB_DEVICE_SRQ_RESIZE
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| IB_DEVICE_MEM_MGT_EXTENSIONS
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| IB_DEVICE_MEM_WINDOW
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| IB_DEVICE_FLUSH_GLOBAL
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| IB_DEVICE_FLUSH_PERSISTENT
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#ifdef CONFIG_64BIT
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| IB_DEVICE_MEM_WINDOW_TYPE_2B
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| IB_DEVICE_ATOMIC_WRITE,
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#else
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| IB_DEVICE_MEM_WINDOW_TYPE_2B,
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#endif /* CONFIG_64BIT */
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RXE_MAX_SGE = 32,
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RXE_MAX_WQE_SIZE = sizeof(struct rxe_send_wqe) +
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sizeof(struct ib_sge) * RXE_MAX_SGE,
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RXE_MAX_INLINE_DATA = RXE_MAX_WQE_SIZE -
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sizeof(struct rxe_send_wqe),
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RXE_MAX_SGE_RD = 32,
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RXE_MAX_CQ = DEFAULT_MAX_VALUE,
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RXE_MAX_LOG_CQE = 15,
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RXE_MAX_PD = DEFAULT_MAX_VALUE,
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RXE_MAX_QP_RD_ATOM = 128,
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RXE_MAX_RES_RD_ATOM = 0x3f000,
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RXE_MAX_QP_INIT_RD_ATOM = 128,
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RXE_MAX_MCAST_GRP = 8192,
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RXE_MAX_MCAST_QP_ATTACH = 56,
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RXE_MAX_TOT_MCAST_QP_ATTACH = 0x70000,
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RXE_MAX_AH = (1<<15) - 1, /* 32Ki - 1 */
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RXE_MIN_AH_INDEX = 1,
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RXE_MAX_AH_INDEX = RXE_MAX_AH,
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RXE_MAX_SRQ_WR = DEFAULT_MAX_VALUE,
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RXE_MIN_SRQ_WR = 1,
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RXE_MAX_SRQ_SGE = 27,
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RXE_MIN_SRQ_SGE = 1,
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RXE_MAX_FMR_PAGE_LIST_LEN = 512,
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RXE_MAX_PKEYS = 64,
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RXE_LOCAL_CA_ACK_DELAY = 15,
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RXE_MAX_UCONTEXT = DEFAULT_MAX_VALUE,
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RXE_NUM_PORT = 1,
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RXE_MIN_QP_INDEX = 16,
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RXE_MAX_QP_INDEX = DEFAULT_MAX_VALUE,
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RXE_MAX_QP = DEFAULT_MAX_VALUE - RXE_MIN_QP_INDEX,
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RXE_MIN_SRQ_INDEX = 0x00020001,
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RXE_MAX_SRQ_INDEX = DEFAULT_MAX_VALUE,
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RXE_MAX_SRQ = DEFAULT_MAX_VALUE - RXE_MIN_SRQ_INDEX,
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RXE_MIN_MR_INDEX = 0x00000001,
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RXE_MAX_MR_INDEX = DEFAULT_MAX_VALUE >> 1,
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RXE_MAX_MR = RXE_MAX_MR_INDEX - RXE_MIN_MR_INDEX,
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RXE_MIN_MW_INDEX = RXE_MAX_MR_INDEX + 1,
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RXE_MAX_MW_INDEX = DEFAULT_MAX_VALUE,
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RXE_MAX_MW = RXE_MAX_MW_INDEX - RXE_MIN_MW_INDEX,
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RXE_MAX_PKT_PER_ACK = 64,
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RXE_MAX_UNACKED_PSNS = 128,
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/* Max inflight SKBs per queue pair */
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RXE_INFLIGHT_SKBS_PER_QP_HIGH = 64,
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RXE_INFLIGHT_SKBS_PER_QP_LOW = 16,
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/* Max number of interations of each work item
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* before yielding the cpu to let other
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* work make progress
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*/
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RXE_MAX_ITERATIONS = 1024,
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/* Delay before calling arbiter timer */
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RXE_NSEC_ARB_TIMER_DELAY = 200,
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/* IBTA v1.4 A3.3.1 VENDOR INFORMATION section */
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RXE_VENDOR_ID = 0XFFFFFF,
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};
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/* default/initial rxe port parameters */
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enum rxe_port_param {
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RXE_PORT_GID_TBL_LEN = 1024,
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RXE_PORT_PORT_CAP_FLAGS = IB_PORT_CM_SUP,
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RXE_PORT_MAX_MSG_SZ = 0x800000,
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RXE_PORT_BAD_PKEY_CNTR = 0,
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RXE_PORT_QKEY_VIOL_CNTR = 0,
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RXE_PORT_LID = 0,
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RXE_PORT_SM_LID = 0,
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RXE_PORT_SM_SL = 0,
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RXE_PORT_LMC = 0,
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RXE_PORT_MAX_VL_NUM = 1,
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RXE_PORT_SUBNET_TIMEOUT = 0,
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RXE_PORT_INIT_TYPE_REPLY = 0,
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RXE_PORT_ACTIVE_WIDTH = IB_WIDTH_1X,
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RXE_PORT_ACTIVE_SPEED = 1,
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RXE_PORT_PKEY_TBL_LEN = 1,
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RXE_PORT_PHYS_STATE = IB_PORT_PHYS_STATE_POLLING,
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RXE_PORT_SUBNET_PREFIX = 0xfe80000000000000ULL,
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};
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/* default/initial port info parameters */
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enum rxe_port_info_param {
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RXE_PORT_INFO_VL_CAP = 4, /* 1-8 */
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RXE_PORT_INFO_MTU_CAP = 5, /* 4096 */
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RXE_PORT_INFO_OPER_VL = 1, /* 1 */
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};
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#endif /* RXE_PARAM_H */
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