90826e0846
The current implementation attempts to recover from an eventual glitch
in the clock by checking frstdata state after reading the first
channel's sample: If frstdata is low, it will reset the chip and
return -EIO.
This will only work in parallel mode, where frstdata pin is set low
after the 2nd sample read starts.
For the serial mode, according to the datasheet, "The FRSTDATA output
returns to a logic low following the 16th SCLK falling edge.", thus
after the Xth pulse, X being the number of bits in a sample, the check
will always be true, and the driver will not work at all in serial
mode if frstdata(optional) is defined in the devicetree as it will
reset the chip, and return -EIO every time read_sample is called.
Hence, this check must be removed for serial mode.
Fixes: b9618c0cac ("staging: IIO: ADC: New driver for AD7606/AD7606-6/AD7606-4")
Signed-off-by: Guillaume Stols <gstols@baylibre.com>
Reviewed-by: Nuno Sa <nuno.sa@analog.com>
Link: https://patch.msgid.link/20240702-cleanup-ad7606-v3-1-18d5ea18770e@baylibre.com
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
173 lines
5.7 KiB
C
173 lines
5.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* AD7606 ADC driver
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*
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* Copyright 2011 Analog Devices Inc.
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*/
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#ifndef IIO_ADC_AD7606_H_
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#define IIO_ADC_AD7606_H_
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#define AD760X_CHANNEL(num, mask_sep, mask_type, mask_all) { \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = num, \
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.address = num, \
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.info_mask_separate = mask_sep, \
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.info_mask_shared_by_type = mask_type, \
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.info_mask_shared_by_all = mask_all, \
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.scan_index = num, \
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.scan_type = { \
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.sign = 's', \
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.realbits = 16, \
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.storagebits = 16, \
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.endianness = IIO_CPU, \
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}, \
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}
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#define AD7605_CHANNEL(num) \
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AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW), \
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BIT(IIO_CHAN_INFO_SCALE), 0)
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#define AD7606_CHANNEL(num) \
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AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW), \
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BIT(IIO_CHAN_INFO_SCALE), \
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BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO))
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#define AD7616_CHANNEL(num) \
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AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),\
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0, BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO))
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/**
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* struct ad7606_chip_info - chip specific information
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* @channels: channel specification
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* @num_channels: number of channels
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* @oversampling_avail pointer to the array which stores the available
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* oversampling ratios.
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* @oversampling_num number of elements stored in oversampling_avail array
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* @os_req_reset some devices require a reset to update oversampling
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* @init_delay_ms required delay in miliseconds for initialization
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* after a restart
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*/
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struct ad7606_chip_info {
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const struct iio_chan_spec *channels;
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unsigned int num_channels;
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const unsigned int *oversampling_avail;
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unsigned int oversampling_num;
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bool os_req_reset;
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unsigned long init_delay_ms;
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};
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/**
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* struct ad7606_state - driver instance specific data
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* @dev pointer to kernel device
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* @chip_info entry in the table of chips that describes this device
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* @bops bus operations (SPI or parallel)
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* @range voltage range selection, selects which scale to apply
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* @oversampling oversampling selection
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* @base_address address from where to read data in parallel operation
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* @sw_mode_en software mode enabled
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* @scale_avail pointer to the array which stores the available scales
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* @num_scales number of elements stored in the scale_avail array
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* @oversampling_avail pointer to the array which stores the available
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* oversampling ratios.
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* @num_os_ratios number of elements stored in oversampling_avail array
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* @write_scale pointer to the function which writes the scale
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* @write_os pointer to the function which writes the os
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* @lock protect sensor state from concurrent accesses to GPIOs
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* @gpio_convst GPIO descriptor for conversion start signal (CONVST)
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* @gpio_reset GPIO descriptor for device hard-reset
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* @gpio_range GPIO descriptor for range selection
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* @gpio_standby GPIO descriptor for stand-by signal (STBY),
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* controls power-down mode of device
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* @gpio_frstdata GPIO descriptor for reading from device when data
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* is being read on the first channel
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* @gpio_os GPIO descriptors to control oversampling on the device
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* @complete completion to indicate end of conversion
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* @trig The IIO trigger associated with the device.
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* @data buffer for reading data from the device
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* @d16 be16 buffer for reading data from the device
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*/
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struct ad7606_state {
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struct device *dev;
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const struct ad7606_chip_info *chip_info;
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const struct ad7606_bus_ops *bops;
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unsigned int range[16];
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unsigned int oversampling;
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void __iomem *base_address;
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bool sw_mode_en;
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const unsigned int *scale_avail;
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unsigned int num_scales;
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const unsigned int *oversampling_avail;
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unsigned int num_os_ratios;
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int (*write_scale)(struct iio_dev *indio_dev, int ch, int val);
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int (*write_os)(struct iio_dev *indio_dev, int val);
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struct mutex lock; /* protect sensor state */
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struct gpio_desc *gpio_convst;
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struct gpio_desc *gpio_reset;
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struct gpio_desc *gpio_range;
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struct gpio_desc *gpio_standby;
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struct gpio_desc *gpio_frstdata;
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struct gpio_descs *gpio_os;
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struct iio_trigger *trig;
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struct completion completion;
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/*
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* DMA (thus cache coherency maintenance) may require the
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* transfer buffers to live in their own cache lines.
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* 16 * 16-bit samples + 64-bit timestamp
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*/
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unsigned short data[20] __aligned(IIO_DMA_MINALIGN);
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__be16 d16[2];
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};
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/**
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* struct ad7606_bus_ops - driver bus operations
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* @read_block function pointer for reading blocks of data
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* @sw_mode_config: pointer to a function which configured the device
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* for software mode
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* @reg_read function pointer for reading spi register
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* @reg_write function pointer for writing spi register
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* @write_mask function pointer for write spi register with mask
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* @rd_wr_cmd pointer to the function which calculates the spi address
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*/
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struct ad7606_bus_ops {
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/* more methods added in future? */
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int (*read_block)(struct device *dev, int num, void *data);
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int (*sw_mode_config)(struct iio_dev *indio_dev);
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int (*reg_read)(struct ad7606_state *st, unsigned int addr);
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int (*reg_write)(struct ad7606_state *st,
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unsigned int addr,
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unsigned int val);
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int (*write_mask)(struct ad7606_state *st,
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unsigned int addr,
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unsigned long mask,
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unsigned int val);
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u16 (*rd_wr_cmd)(int addr, char isWriteOp);
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};
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int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
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const char *name, unsigned int id,
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const struct ad7606_bus_ops *bops);
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int ad7606_reset(struct ad7606_state *st);
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enum ad7606_supported_device_ids {
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ID_AD7605_4,
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ID_AD7606_8,
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ID_AD7606_6,
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ID_AD7606_4,
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ID_AD7606B,
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ID_AD7616,
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};
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#ifdef CONFIG_PM_SLEEP
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extern const struct dev_pm_ops ad7606_pm_ops;
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#define AD7606_PM_OPS (&ad7606_pm_ops)
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#else
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#define AD7606_PM_OPS NULL
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#endif
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#endif /* IIO_ADC_AD7606_H_ */
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