4042902408
We seem to have hit warnings of 'output may be truncated' which is fixed
by increasing the size of 'dev_id'
drivers/dma/sh/shdmac.c: In function ‘sh_dmae_probe’:
drivers/dma/sh/shdmac.c:541:34: error: ‘%d’ directive output may be truncated writing between 1 and 10 bytes into a region of size 9 [-Werror=format-truncation=]
541 | "sh-dmae%d.%d", pdev->id, id);
| ^~
In function ‘sh_dmae_chan_probe’,
inlined from ‘sh_dmae_probe’ at drivers/dma/sh/shdmac.c:845:9:
drivers/dma/sh/shdmac.c:541:26: note: directive argument in the range [0, 2147483647]
541 | "sh-dmae%d.%d", pdev->id, id);
| ^~~~~~~~~~~~~~
drivers/dma/sh/shdmac.c:541:26: note: directive argument in the range [0, 19]
drivers/dma/sh/shdmac.c:540:17: note: ‘snprintf’ output between 11 and 21 bytes into a destination of size 16
540 | snprintf(sh_chan->dev_id, sizeof(sh_chan->dev_id),
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
541 | "sh-dmae%d.%d", pdev->id, id);
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Vinod Koul <vkoul@kernel.org>
62 lines
1.6 KiB
C
62 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Renesas SuperH DMA Engine support
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*
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* Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
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* Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
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*
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*/
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#ifndef __DMA_SHDMA_H
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#define __DMA_SHDMA_H
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#include <linux/sh_dma.h>
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#include <linux/shdma-base.h>
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#include <linux/dmaengine.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#define SH_DMAE_MAX_CHANNELS 20
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#define SH_DMAE_TCR_MAX 0x00FFFFFF /* 16MB */
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struct device;
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struct sh_dmae_chan {
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struct shdma_chan shdma_chan;
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const struct sh_dmae_slave_config *config; /* Slave DMA configuration */
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int xmit_shift; /* log_2(bytes_per_xfer) */
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void __iomem *base;
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char dev_id[32]; /* unique name per DMAC of channel */
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int pm_error;
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dma_addr_t slave_addr;
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};
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struct sh_dmae_device {
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struct shdma_dev shdma_dev;
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struct sh_dmae_chan *chan[SH_DMAE_MAX_CHANNELS];
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const struct sh_dmae_pdata *pdata;
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struct list_head node;
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void __iomem *chan_reg;
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void __iomem *dmars;
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unsigned int chcr_offset;
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u32 chcr_ie_bit;
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};
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struct sh_dmae_regs {
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u32 sar; /* SAR / source address */
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u32 dar; /* DAR / destination address */
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u32 tcr; /* TCR / transfer count */
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};
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struct sh_dmae_desc {
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struct sh_dmae_regs hw;
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struct shdma_desc shdma_desc;
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};
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#define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, shdma_chan)
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#define to_sh_desc(lh) container_of(lh, struct sh_desc, node)
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#define tx_to_sh_desc(tx) container_of(tx, struct sh_desc, async_tx)
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#define to_sh_dev(chan) container_of(chan->shdma_chan.dma_chan.device,\
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struct sh_dmae_device, shdma_dev.dma_dev)
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#endif /* __DMA_SHDMA_H */
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