58d1692835
There is absolutely no point to write the APIC ID which was read from the local APIC earlier, back into the local APIC for the 64-bit UP case. Remove that along with the apic callback which is solely there for this pointless exercise. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Michael Kelley <mhklinux@outlook.com> Tested-by: Sohil Mehta <sohil.mehta@intel.com> Link: https://lore.kernel.org/r/20240212154640.055288922@linutronix.de
166 lines
3.7 KiB
C
166 lines
3.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/cpumask.h>
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#include <linux/acpi.h>
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#include "local.h"
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int x2apic_phys;
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static struct apic apic_x2apic_phys;
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u32 x2apic_max_apicid __ro_after_init = UINT_MAX;
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void __init x2apic_set_max_apicid(u32 apicid)
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{
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x2apic_max_apicid = apicid;
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if (apic->x2apic_set_max_apicid)
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apic->max_apic_id = apicid;
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}
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static int __init set_x2apic_phys_mode(char *arg)
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{
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x2apic_phys = 1;
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return 0;
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}
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early_param("x2apic_phys", set_x2apic_phys_mode);
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static bool x2apic_fadt_phys(void)
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{
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#ifdef CONFIG_ACPI
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if ((acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) &&
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(acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) {
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printk(KERN_DEBUG "System requires x2apic physical mode\n");
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return true;
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}
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#endif
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return false;
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}
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static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
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{
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return x2apic_enabled() && (x2apic_phys || x2apic_fadt_phys());
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}
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static void x2apic_send_IPI(int cpu, int vector)
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{
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u32 dest = per_cpu(x86_cpu_to_apicid, cpu);
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/* x2apic MSRs are special and need a special fence: */
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weak_wrmsr_fence();
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__x2apic_send_IPI_dest(dest, vector, APIC_DEST_PHYSICAL);
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}
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static void
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__x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
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{
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unsigned long query_cpu;
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unsigned long this_cpu;
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unsigned long flags;
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/* x2apic MSRs are special and need a special fence: */
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weak_wrmsr_fence();
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local_irq_save(flags);
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this_cpu = smp_processor_id();
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for_each_cpu(query_cpu, mask) {
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if (apic_dest == APIC_DEST_ALLBUT && this_cpu == query_cpu)
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continue;
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__x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
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vector, APIC_DEST_PHYSICAL);
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}
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local_irq_restore(flags);
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}
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static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
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{
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__x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
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}
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static void
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x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
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{
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__x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
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}
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static void __x2apic_send_IPI_shorthand(int vector, u32 which)
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{
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unsigned long cfg = __prepare_ICR(which, vector, 0);
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/* x2apic MSRs are special and need a special fence: */
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weak_wrmsr_fence();
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native_x2apic_icr_write(cfg, 0);
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}
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void x2apic_send_IPI_allbutself(int vector)
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{
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__x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLBUT);
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}
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void x2apic_send_IPI_all(int vector)
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{
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__x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLINC);
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}
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void x2apic_send_IPI_self(int vector)
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{
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apic_write(APIC_SELF_IPI, vector);
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}
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void __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest)
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{
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unsigned long cfg = __prepare_ICR(0, vector, dest);
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native_x2apic_icr_write(cfg, apicid);
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}
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static int x2apic_phys_probe(void)
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{
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if (!x2apic_mode)
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return 0;
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if (x2apic_phys || x2apic_fadt_phys())
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return 1;
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return apic == &apic_x2apic_phys;
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}
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u32 x2apic_get_apic_id(u32 id)
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{
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return id;
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}
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static struct apic apic_x2apic_phys __ro_after_init = {
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.name = "physical x2apic",
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.probe = x2apic_phys_probe,
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.acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
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.dest_mode_logical = false,
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.disable_esr = 0,
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.cpu_present_to_apicid = default_cpu_present_to_apicid,
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.max_apic_id = UINT_MAX,
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.x2apic_set_max_apicid = true,
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.get_apic_id = x2apic_get_apic_id,
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.calc_dest_apicid = apic_default_calc_apicid,
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.send_IPI = x2apic_send_IPI,
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.send_IPI_mask = x2apic_send_IPI_mask,
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.send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
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.send_IPI_allbutself = x2apic_send_IPI_allbutself,
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.send_IPI_all = x2apic_send_IPI_all,
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.send_IPI_self = x2apic_send_IPI_self,
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.nmi_to_offline_cpu = true,
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.read = native_apic_msr_read,
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.write = native_apic_msr_write,
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.eoi = native_apic_msr_eoi,
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.icr_read = native_x2apic_icr_read,
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.icr_write = native_x2apic_icr_write,
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};
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apic_driver(apic_x2apic_phys);
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