0fdebc5ec2
Based on the normalized pattern:
this file is licensed under the terms of the gnu general public
license version 2 this program is licensed as is without any warranty
of any kind whether express or implied
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference.
Reviewed-by: Allison Randal <allison@lohutok.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
38 lines
1000 B
ArmAsm
38 lines
1000 B
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* SMP support: Entry point for secondary CPUs
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*
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* Copyright (C) 2012 Marvell
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*
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* Yehuda Yitschak <yehuday@marvell.com>
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* Gregory CLEMENT <gregory.clement@free-electrons.com>
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This file implements the assembly entry point for secondary CPUs in
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* an SMP kernel. The only thing we need to do is to add the CPU to
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* the coherency fabric by writing to 2 registers. Currently the base
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* register addresses are hard coded due to the early initialisation
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* problems.
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/assembler.h>
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/*
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* Armada XP specific entry point for secondary CPUs.
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* We add the CPU to the coherency fabric and then jump to secondary
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* startup
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*/
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ENTRY(armada_xp_secondary_startup)
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ARM_BE8(setend be ) @ go BE8 if entered LE
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bl ll_add_cpu_to_smp_group
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bl ll_enable_coherency
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b secondary_startup
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ENDPROC(armada_xp_secondary_startup)
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