c61978175a
Add the clock bindings for the MediaTek MT8365 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> Link: https://lore.kernel.org/r/20220822152652.3499972-2-msp@baylibre.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
43 lines
874 B
YAML
43 lines
874 B
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/clock/mediatek,mt8365-clock.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: MediaTek Functional Clock Controller for MT8365
|
|
|
|
maintainers:
|
|
- Markus Schneider-Pargmann <msp@baylibre.com>
|
|
|
|
properties:
|
|
compatible:
|
|
items:
|
|
- enum:
|
|
- mediatek,mt8365-apu
|
|
- mediatek,mt8365-imgsys
|
|
- mediatek,mt8365-mfgcfg
|
|
- mediatek,mt8365-vdecsys
|
|
- mediatek,mt8365-vencsys
|
|
- const: syscon
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
'#clock-cells':
|
|
const: 1
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- '#clock-cells'
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
- |
|
|
apu: clock-controller@19020000 {
|
|
compatible = "mediatek,mt8365-apu", "syscon";
|
|
reg = <0x19020000 0x1000>;
|
|
#clock-cells = <1>;
|
|
};
|