4ccba8cb2c
Add C3 PLL controller input clock parameters "fix".
The clock named "fix" was initially implemented in PLL clock controller
driver. However, some registers required secure zone access, so we moved
it to the secure zone (BL31) and accessed it through SCMI. Since the PLL
clock driver needs to use this clock, the "fix" clock is used as an input
source. We updated the driver but forgot to modify the binding accordingly,
so we are adding it here.
It is an ABI break but on a new and immature platform. Noboby could really
use that platform at this stage, so nothing is going to break on anyone
really.
Fixes: 0e6be855a9 ("dt-bindings: clock: add Amlogic C3 PLL clock controller")
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://lore.kernel.org/r/20240830-c3_add_node-v4-1-b56c0511e9dc@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
63 lines
1.3 KiB
YAML
63 lines
1.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (C) 2022-2023 Amlogic, Inc. All rights reserved
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/amlogic,c3-pll-clkc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Amlogic C3 series PLL Clock Controller
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maintainers:
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- Neil Armstrong <neil.armstrong@linaro.org>
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- Jerome Brunet <jbrunet@baylibre.com>
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- Chuan Liu <chuan.liu@amlogic.com>
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- Xianwei Zhao <xianwei.zhao@amlogic.com>
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properties:
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compatible:
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const: amlogic,c3-pll-clkc
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reg:
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maxItems: 1
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clocks:
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items:
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- description: input top pll
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- description: input mclk pll
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- description: input fix pll
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clock-names:
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items:
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- const: top
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- const: mclk
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- const: fix
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"#clock-cells":
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const: 1
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- "#clock-cells"
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additionalProperties: false
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examples:
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- |
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apb {
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#address-cells = <2>;
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#size-cells = <2>;
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clock-controller@8000 {
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compatible = "amlogic,c3-pll-clkc";
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reg = <0x0 0x8000 0x0 0x1a4>;
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clocks = <&scmi_clk 2>,
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<&scmi_clk 5>,
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<&scmi_clk 12>;
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clock-names = "top", "mclk", "fix";
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#clock-cells = <1>;
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};
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};
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