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linux/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml
Dmitry Rokosov 96f3b97873 dt-bindings: clock: meson: a1: pll: introduce new syspll bindings
The 'syspll' PLL is a general-purpose PLL designed specifically for the
CPU clock. It is capable of producing output frequencies within the
range of 768MHz to 1536MHz.

The 'syspll_in' source clock is an optional parent connection from the
peripherals clock controller.

Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240515185103.20256-3-ddrokosov@salutedevices.com
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2024-06-10 12:16:45 +02:00

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YAML

# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/amlogic,a1-pll-clkc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amlogic A1 PLL Clock Control Unit
maintainers:
- Neil Armstrong <neil.armstrong@linaro.org>
- Jerome Brunet <jbrunet@baylibre.com>
- Jian Hu <jian.hu@jian.hu.com>
- Dmitry Rokosov <ddrokosov@sberdevices.ru>
properties:
compatible:
const: amlogic,a1-pll-clkc
'#clock-cells':
const: 1
reg:
maxItems: 1
clocks:
items:
- description: input fixpll_in
- description: input hifipll_in
- description: input syspll_in
minItems: 2 # syspll_in is optional
clock-names:
items:
- const: fixpll_in
- const: hifipll_in
- const: syspll_in
minItems: 2 # syspll_in is optional
required:
- compatible
- '#clock-cells'
- reg
- clocks
- clock-names
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/amlogic,a1-peripherals-clkc.h>
apb {
#address-cells = <2>;
#size-cells = <2>;
clock-controller@7c80 {
compatible = "amlogic,a1-pll-clkc";
reg = <0 0x7c80 0 0x18c>;
#clock-cells = <1>;
clocks = <&clkc_periphs CLKID_FIXPLL_IN>,
<&clkc_periphs CLKID_HIFIPLL_IN>,
<&clkc_periphs CLKID_SYSPLL_IN>;
clock-names = "fixpll_in", "hifipll_in", "syspll_in";
};
};