908dcecda1
Correct the return type of handle_IRQ_event() (inconsistency noticed during Xen development), and remove redundant declarations. The return type adjustment required breaking out the definition of irqreturn_t into a separate header, in order to satisfy current include order dependencies. Signed-off-by: Jan Beulich <jbeulich@novell.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ian Molton <spyro@f2s.com> Cc: Mikael Starvik <starvik@axis.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Hirokazu Takata <takata.hirokazu@renesas.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: William Lee Irwin III <wli@holomorphy.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Miles Bader <uclinux-v850@lsi.nec.co.jp> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Roman Zippel <zippel@linux-m68k.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
91 lines
2.6 KiB
C
91 lines
2.6 KiB
C
#ifndef _M68K_IRQ_H_
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#define _M68K_IRQ_H_
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#include <asm/ptrace.h>
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#ifdef CONFIG_COLDFIRE
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/*
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* On the ColdFire we keep track of all vectors. That way drivers
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* can register whatever vector number they wish, and we can deal
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* with it.
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*/
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#define SYS_IRQS 256
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#define NR_IRQS SYS_IRQS
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#else
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/*
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* # of m68k interrupts
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*/
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#define SYS_IRQS 8
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#define NR_IRQS (24+SYS_IRQS)
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#endif /* CONFIG_COLDFIRE */
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/*
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* Interrupt source definitions
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* General interrupt sources are the level 1-7.
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* Adding an interrupt service routine for one of these sources
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* results in the addition of that routine to a chain of routines.
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* Each one is called in succession. Each individual interrupt
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* service routine should determine if the device associated with
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* that routine requires service.
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*/
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#define IRQ1 (1) /* level 1 interrupt */
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#define IRQ2 (2) /* level 2 interrupt */
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#define IRQ3 (3) /* level 3 interrupt */
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#define IRQ4 (4) /* level 4 interrupt */
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#define IRQ5 (5) /* level 5 interrupt */
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#define IRQ6 (6) /* level 6 interrupt */
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#define IRQ7 (7) /* level 7 interrupt (non-maskable) */
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/*
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* Machine specific interrupt sources.
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*
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* Adding an interrupt service routine for a source with this bit
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* set indicates a special machine specific interrupt source.
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* The machine specific files define these sources.
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*
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* The IRQ_MACHSPEC bit is now gone - the only thing it did was to
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* introduce unnecessary overhead.
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*
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* All interrupt handling is actually machine specific so it is better
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* to use function pointers, as used by the Sparc port, and select the
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* interrupt handling functions when initializing the kernel. This way
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* we save some unnecessary overhead at run-time.
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* 01/11/97 - Jes
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*/
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extern void (*mach_enable_irq)(unsigned int);
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extern void (*mach_disable_irq)(unsigned int);
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/*
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* various flags for request_irq() - the Amiga now uses the standard
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* mechanism like all other architectures - SA_INTERRUPT and SA_SHIRQ
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* are your friends.
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*/
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#define IRQ_FLG_LOCK (0x0001) /* handler is not replaceable */
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#define IRQ_FLG_REPLACE (0x0002) /* replace existing handler */
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#define IRQ_FLG_FAST (0x0004)
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#define IRQ_FLG_SLOW (0x0008)
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#define IRQ_FLG_STD (0x8000) /* internally used */
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#ifdef CONFIG_M68360
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#define CPM_INTERRUPT IRQ4
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/* see MC68360 User's Manual, p. 7-377 */
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#define CPM_VECTOR_BASE 0x04 /* 3 MSbits of CPM vector */
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#endif /* CONFIG_M68360 */
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/*
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* Some drivers want these entry points
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*/
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#define enable_irq(x) 0
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#define disable_irq(x) do { } while (0)
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#define disable_irq_nosync(x) disable_irq(x)
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#endif /* _M68K_IRQ_H_ */
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