a714b9cfab
Add watchdog timer hwmod data for OMAP2420 chip Signed-off-by: Charulatha V <charu@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
247 lines
6.5 KiB
C
247 lines
6.5 KiB
C
/*
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* omap_hwmod_2420_data.c - hardware modules present on the OMAP2420 chips
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*
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* Copyright (C) 2009-2010 Nokia Corporation
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* Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* XXX handle crossbar/shared link difference for L3?
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* XXX these should be marked initdata for multi-OMAP kernels
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*/
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#include <plat/omap_hwmod.h>
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#include <mach/irqs.h>
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#include <plat/cpu.h>
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#include <plat/dma.h>
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#include "omap_hwmod_common_data.h"
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#include "prm-regbits-24xx.h"
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#include "cm-regbits-24xx.h"
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/*
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* OMAP2420 hardware module integration data
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*
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* ALl of the data in this section should be autogeneratable from the
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* TI hardware database or other technical documentation. Data that
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* is driver-specific or driver-kernel integration-specific belongs
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* elsewhere.
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*/
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static struct omap_hwmod omap2420_mpu_hwmod;
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static struct omap_hwmod omap2420_iva_hwmod;
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static struct omap_hwmod omap2420_l3_main_hwmod;
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static struct omap_hwmod omap2420_l4_core_hwmod;
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static struct omap_hwmod omap2420_wd_timer2_hwmod;
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/* L3 -> L4_CORE interface */
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static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = {
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.master = &omap2420_l3_main_hwmod,
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.slave = &omap2420_l4_core_hwmod,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* MPU -> L3 interface */
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static struct omap_hwmod_ocp_if omap2420_mpu__l3_main = {
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.master = &omap2420_mpu_hwmod,
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.slave = &omap2420_l3_main_hwmod,
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.user = OCP_USER_MPU,
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};
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/* Slave interfaces on the L3 interconnect */
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static struct omap_hwmod_ocp_if *omap2420_l3_main_slaves[] = {
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&omap2420_mpu__l3_main,
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};
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/* Master interfaces on the L3 interconnect */
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static struct omap_hwmod_ocp_if *omap2420_l3_main_masters[] = {
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&omap2420_l3_main__l4_core,
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};
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/* L3 */
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static struct omap_hwmod omap2420_l3_main_hwmod = {
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.name = "l3_main",
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.class = &l3_hwmod_class,
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.masters = omap2420_l3_main_masters,
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.masters_cnt = ARRAY_SIZE(omap2420_l3_main_masters),
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.slaves = omap2420_l3_main_slaves,
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.slaves_cnt = ARRAY_SIZE(omap2420_l3_main_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
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.flags = HWMOD_NO_IDLEST,
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};
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static struct omap_hwmod omap2420_l4_wkup_hwmod;
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/* L4_CORE -> L4_WKUP interface */
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static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
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.master = &omap2420_l4_core_hwmod,
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.slave = &omap2420_l4_wkup_hwmod,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* Slave interfaces on the L4_CORE interconnect */
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static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = {
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&omap2420_l3_main__l4_core,
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};
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/* Master interfaces on the L4_CORE interconnect */
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static struct omap_hwmod_ocp_if *omap2420_l4_core_masters[] = {
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&omap2420_l4_core__l4_wkup,
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};
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/* L4 CORE */
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static struct omap_hwmod omap2420_l4_core_hwmod = {
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.name = "l4_core",
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.class = &l4_hwmod_class,
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.masters = omap2420_l4_core_masters,
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.masters_cnt = ARRAY_SIZE(omap2420_l4_core_masters),
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.slaves = omap2420_l4_core_slaves,
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.slaves_cnt = ARRAY_SIZE(omap2420_l4_core_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
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.flags = HWMOD_NO_IDLEST,
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};
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/* Slave interfaces on the L4_WKUP interconnect */
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static struct omap_hwmod_ocp_if *omap2420_l4_wkup_slaves[] = {
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&omap2420_l4_core__l4_wkup,
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};
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/* Master interfaces on the L4_WKUP interconnect */
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static struct omap_hwmod_ocp_if *omap2420_l4_wkup_masters[] = {
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};
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/* L4 WKUP */
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static struct omap_hwmod omap2420_l4_wkup_hwmod = {
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.name = "l4_wkup",
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.class = &l4_hwmod_class,
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.masters = omap2420_l4_wkup_masters,
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.masters_cnt = ARRAY_SIZE(omap2420_l4_wkup_masters),
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.slaves = omap2420_l4_wkup_slaves,
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.slaves_cnt = ARRAY_SIZE(omap2420_l4_wkup_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
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.flags = HWMOD_NO_IDLEST,
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};
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/* Master interfaces on the MPU device */
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static struct omap_hwmod_ocp_if *omap2420_mpu_masters[] = {
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&omap2420_mpu__l3_main,
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};
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/* MPU */
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static struct omap_hwmod omap2420_mpu_hwmod = {
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.name = "mpu",
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.class = &mpu_hwmod_class,
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.main_clk = "mpu_ck",
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.masters = omap2420_mpu_masters,
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.masters_cnt = ARRAY_SIZE(omap2420_mpu_masters),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
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};
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/*
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* IVA1 interface data
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*/
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/* IVA <- L3 interface */
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static struct omap_hwmod_ocp_if omap2420_l3__iva = {
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.master = &omap2420_l3_main_hwmod,
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.slave = &omap2420_iva_hwmod,
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.clk = "iva1_ifck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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static struct omap_hwmod_ocp_if *omap2420_iva_masters[] = {
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&omap2420_l3__iva,
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};
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/*
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* IVA2 (IVA2)
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*/
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static struct omap_hwmod omap2420_iva_hwmod = {
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.name = "iva",
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.class = &iva_hwmod_class,
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.masters = omap2420_iva_masters,
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.masters_cnt = ARRAY_SIZE(omap2420_iva_masters),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
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};
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/* l4_wkup -> wd_timer2 */
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static struct omap_hwmod_addr_space omap2420_wd_timer2_addrs[] = {
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{
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.pa_start = 0x48022000,
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.pa_end = 0x4802207f,
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.flags = ADDR_TYPE_RT
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},
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};
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static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = {
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.master = &omap2420_l4_wkup_hwmod,
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.slave = &omap2420_wd_timer2_hwmod,
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.clk = "mpu_wdt_ick",
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.addr = omap2420_wd_timer2_addrs,
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.addr_cnt = ARRAY_SIZE(omap2420_wd_timer2_addrs),
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/*
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* 'wd_timer' class
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* 32-bit watchdog upward counter that generates a pulse on the reset pin on
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* overflow condition
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*/
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static struct omap_hwmod_class_sysconfig omap2420_wd_timer_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.syss_offs = 0x0014,
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.sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET |
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SYSC_HAS_AUTOIDLE),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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static struct omap_hwmod_class omap2420_wd_timer_hwmod_class = {
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.name = "wd_timer",
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.sysc = &omap2420_wd_timer_sysc,
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};
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/* wd_timer2 */
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static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = {
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&omap2420_l4_wkup__wd_timer2,
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};
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static struct omap_hwmod omap2420_wd_timer2_hwmod = {
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.name = "wd_timer2",
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.class = &omap2420_wd_timer_hwmod_class,
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.main_clk = "mpu_wdt_fck",
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.prcm = {
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.omap2 = {
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.prcm_reg_id = 1,
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.module_bit = OMAP24XX_EN_MPU_WDT_SHIFT,
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.module_offs = WKUP_MOD,
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.idlest_reg_id = 1,
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.idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT,
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},
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},
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.slaves = omap2420_wd_timer2_slaves,
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.slaves_cnt = ARRAY_SIZE(omap2420_wd_timer2_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
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};
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static __initdata struct omap_hwmod *omap2420_hwmods[] = {
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&omap2420_l3_main_hwmod,
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&omap2420_l4_core_hwmod,
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&omap2420_l4_wkup_hwmod,
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&omap2420_mpu_hwmod,
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&omap2420_iva_hwmod,
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&omap2420_wd_timer2_hwmod,
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NULL,
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};
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int __init omap2420_hwmod_init(void)
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{
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return omap_hwmod_init(omap2420_hwmods);
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}
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