45a33c3a55
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
107 lines
2.8 KiB
C
107 lines
2.8 KiB
C
/*
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* arch/mips/emma2rh/common/irq.c
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* This file is common irq dispatcher.
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*
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* Copyright (C) NEC Electronics Corporation 2005-2006
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*
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* This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c
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*
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* Copyright 2001 MontaVista Software Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/types.h>
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#include <asm/system.h>
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#include <asm/mipsregs.h>
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#include <asm/debug.h>
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#include <asm/addrspace.h>
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#include <asm/bootinfo.h>
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#include <asm/emma2rh/emma2rh.h>
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/*
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* the first level int-handler will jump here if it is a emma2rh irq
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*/
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void emma2rh_irq_dispatch(void)
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{
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u32 intStatus;
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u32 bitmask;
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u32 i;
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intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0)
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& emma2rh_in32(EMMA2RH_BHIF_INT_EN_0);
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#ifdef EMMA2RH_SW_CASCADE
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if (intStatus &
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(1 << ((EMMA2RH_SW_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
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u32 swIntStatus;
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swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT)
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& emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
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for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
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if (swIntStatus & bitmask) {
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do_IRQ(EMMA2RH_SW_IRQ_BASE + i);
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return;
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}
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}
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}
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#endif
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for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
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if (intStatus & bitmask) {
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do_IRQ(EMMA2RH_IRQ_BASE + i);
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return;
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}
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}
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intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1)
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& emma2rh_in32(EMMA2RH_BHIF_INT_EN_1);
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#ifdef EMMA2RH_GPIO_CASCADE
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if (intStatus &
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(1 << ((EMMA2RH_GPIO_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
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u32 gpioIntStatus;
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gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST)
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& emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
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for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
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if (gpioIntStatus & bitmask) {
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do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i);
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return;
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}
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}
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}
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#endif
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for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) {
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if (intStatus & bitmask) {
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do_IRQ(EMMA2RH_IRQ_BASE + i);
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return;
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}
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}
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intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2)
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& emma2rh_in32(EMMA2RH_BHIF_INT_EN_2);
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for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) {
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if (intStatus & bitmask) {
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do_IRQ(EMMA2RH_IRQ_BASE + i);
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return;
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}
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}
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}
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