74b265d4e0
We need to add plat-s3c to the build to get the headers that will go in here once moved from include/asm-arm so we may as well put some useful common s3c code in here to stop the errors generated form having nothing built. The cpu setup is now passed the cpu idcode and the table of supported cpus to s3c_init_cpu() to abstract the cpu identification out of the initial io setup. As well as moving the cpu initialisation code, we move the map of the board specific items up to the calling code as none of the map_io() functions actually do anything other than pass this to iotable_init(). This patch does not rename any of the init functions that will be common to s3c24xx and any other s3c architectures as this can be done at a later date as it will touch all the board support files which use functions such as s3c24xx_init_clocks() and s3c24xx_init_uarts(). Note, the header arch/arm/plat-s3c24xx/include/plat/cpu.h still has functions that are used by both the cpu and board initialisation functions. This means that each board has definitions specific to the cpu support included and the vice-versa. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
162 lines
3.5 KiB
C
162 lines
3.5 KiB
C
/* linux/arch/arm/plat-s3c/init.c
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*
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* Copyright (c) 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* S3C series CPU initialisation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/serial_core.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <mach/hardware.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <plat/cpu.h>
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#include <plat/devs.h>
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#include <plat/clock.h>
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#include <plat/regs-serial.h>
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static struct cpu_table *cpu;
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static struct cpu_table * __init s3c_lookup_cpu(unsigned long idcode,
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struct cpu_table *tab,
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unsigned int count)
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{
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for (; count != 0; count--, tab++) {
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if ((idcode & tab->idmask) == tab->idcode)
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return tab;
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}
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return NULL;
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}
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void __init s3c_init_cpu(unsigned long idcode,
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struct cpu_table *cputab, unsigned int cputab_size)
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{
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cpu = s3c_lookup_cpu(idcode, cputab, cputab_size);
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if (cpu == NULL) {
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printk(KERN_ERR "Unknown CPU type 0x%08lx\n", idcode);
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panic("Unknown S3C24XX CPU");
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}
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printk("CPU %s (id 0x%08lx)\n", cpu->name, idcode);
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if (cpu->map_io == NULL || cpu->init == NULL) {
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printk(KERN_ERR "CPU %s support not enabled\n", cpu->name);
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panic("Unsupported Samsung CPU");
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}
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cpu->map_io();
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}
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/* s3c24xx_init_clocks
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*
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* Initialise the clock subsystem and associated information from the
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* given master crystal value.
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*
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* xtal = 0 -> use default PLL crystal value (normally 12MHz)
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* != 0 -> PLL crystal value in Hz
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*/
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void __init s3c24xx_init_clocks(int xtal)
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{
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if (xtal == 0)
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xtal = 12*1000*1000;
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if (cpu == NULL)
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panic("s3c24xx_init_clocks: no cpu setup?\n");
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if (cpu->init_clocks == NULL)
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panic("s3c24xx_init_clocks: cpu has no clock init\n");
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else
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(cpu->init_clocks)(xtal);
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}
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/* uart management */
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static int nr_uarts __initdata = 0;
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static struct s3c2410_uartcfg uart_cfgs[3];
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/* s3c24xx_init_uartdevs
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*
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* copy the specified platform data and configuration into our central
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* set of devices, before the data is thrown away after the init process.
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*
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* This also fills in the array passed to the serial driver for the
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* early initialisation of the console.
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*/
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void __init s3c24xx_init_uartdevs(char *name,
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struct s3c24xx_uart_resources *res,
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struct s3c2410_uartcfg *cfg, int no)
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{
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struct platform_device *platdev;
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struct s3c2410_uartcfg *cfgptr = uart_cfgs;
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struct s3c24xx_uart_resources *resp;
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int uart;
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memcpy(cfgptr, cfg, sizeof(struct s3c2410_uartcfg) * no);
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for (uart = 0; uart < no; uart++, cfg++, cfgptr++) {
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platdev = s3c24xx_uart_src[cfgptr->hwport];
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resp = res + cfgptr->hwport;
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s3c24xx_uart_devs[uart] = platdev;
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platdev->name = name;
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platdev->resource = resp->resources;
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platdev->num_resources = resp->nr_resources;
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platdev->dev.platform_data = cfgptr;
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}
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nr_uarts = no;
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}
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void __init s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
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{
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if (cpu == NULL)
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return;
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if (cpu->init_uarts == NULL) {
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printk(KERN_ERR "s3c24xx_init_uarts: cpu has no uart init\n");
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} else
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(cpu->init_uarts)(cfg, no);
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}
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static int __init s3c_arch_init(void)
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{
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int ret;
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// do the correct init for cpu
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if (cpu == NULL)
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panic("s3c_arch_init: NULL cpu\n");
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ret = (cpu->init)();
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if (ret != 0)
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return ret;
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ret = platform_add_devices(s3c24xx_uart_devs, nr_uarts);
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return ret;
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}
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arch_initcall(s3c_arch_init);
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