0bc2ecb6e5
Update the device tree to indicate which I2C controller is the DVC controller. AUXDATA needs to be updated too, since the compatible value changed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
158 lines
4.9 KiB
C
158 lines
4.9 KiB
C
/*
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* nVidia Tegra device tree board support
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*
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* Copyright (C) 2010 Secret Lab Technologies, Ltd.
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* Copyright (C) 2010 Google, Inc.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <linux/irqdomain.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_fdt.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/pda_power.h>
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#include <linux/io.h>
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#include <linux/i2c.h>
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#include <linux/i2c-tegra.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/setup.h>
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#include <asm/hardware/gic.h>
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#include <mach/iomap.h>
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#include <mach/irqs.h>
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#include "board.h"
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#include "board-harmony.h"
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#include "clock.h"
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#include "devices.h"
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void harmony_pinmux_init(void);
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void paz00_pinmux_init(void);
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void seaboard_pinmux_init(void);
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void trimslice_pinmux_init(void);
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void ventana_pinmux_init(void);
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static const struct of_device_id tegra_dt_irq_match[] __initconst = {
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{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
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{ }
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};
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void __init tegra_dt_init_irq(void)
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{
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tegra_init_irq();
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of_irq_init(tegra_dt_irq_match);
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}
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struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
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OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
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OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
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OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),
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OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC4_BASE, "sdhci-tegra.3", NULL),
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OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL),
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OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL),
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OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL),
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OF_DEV_AUXDATA("nvidia,tegra20-i2c-dvc", TEGRA_DVC_BASE, "tegra-i2c.3", NULL),
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OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL),
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OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S2_BASE, "tegra-i2s.1", NULL),
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OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL),
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OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB_BASE, "tegra-ehci.0",
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&tegra_ehci1_device.dev.platform_data),
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OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB2_BASE, "tegra-ehci.1",
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&tegra_ehci2_device.dev.platform_data),
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OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2",
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&tegra_ehci3_device.dev.platform_data),
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{}
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};
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static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
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/* name parent rate enabled */
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{ "uartd", "pll_p", 216000000, true },
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{ "usbd", "clk_m", 12000000, false },
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{ "usb2", "clk_m", 12000000, false },
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{ "usb3", "clk_m", 12000000, false },
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{ "pll_a", "pll_p_out1", 56448000, true },
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{ "pll_a_out0", "pll_a", 11289600, true },
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{ "cdev1", NULL, 0, true },
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{ "i2s1", "pll_a_out0", 11289600, false},
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{ "i2s2", "pll_a_out0", 11289600, false},
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{ NULL, NULL, 0, 0},
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};
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static struct of_device_id tegra_dt_match_table[] __initdata = {
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{ .compatible = "simple-bus", },
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{}
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};
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static struct {
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char *machine;
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void (*init)(void);
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} pinmux_configs[] = {
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{ "compulab,trimslice", trimslice_pinmux_init },
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{ "nvidia,harmony", harmony_pinmux_init },
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{ "compal,paz00", paz00_pinmux_init },
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{ "nvidia,seaboard", seaboard_pinmux_init },
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{ "nvidia,ventana", ventana_pinmux_init },
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};
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static void __init tegra_dt_init(void)
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{
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int i;
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tegra_clk_init_from_table(tegra_dt_clk_init_table);
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/*
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* Finished with the static registrations now; fill in the missing
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* devices
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*/
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of_platform_populate(NULL, tegra_dt_match_table,
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tegra20_auxdata_lookup, NULL);
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for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) {
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if (of_machine_is_compatible(pinmux_configs[i].machine)) {
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pinmux_configs[i].init();
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break;
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}
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}
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WARN(i == ARRAY_SIZE(pinmux_configs),
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"Unknown platform! Pinmuxing not initialized\n");
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}
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static const char * tegra_dt_board_compat[] = {
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"compulab,trimslice",
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"nvidia,harmony",
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"compal,paz00",
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"nvidia,seaboard",
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"nvidia,ventana",
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NULL
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};
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DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
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.map_io = tegra_map_common_io,
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.init_early = tegra_init_early,
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.init_irq = tegra_dt_init_irq,
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.timer = &tegra_timer,
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.init_machine = tegra_dt_init,
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.dt_compat = tegra_dt_board_compat,
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MACHINE_END
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