7f30491ccd
After moving the the include files there were a few clean-ups: 1) Some files used #include <asm-ia64/xyz.h>, changed to <asm/xyz.h> 2) Some comments alerted maintainers to look at various header files to make matching updates if certain code were to be changed. Updated these comments to use the new include paths. 3) Some header files mentioned their own names in initial comments. Just deleted these self references. Signed-off-by: Tony Luck <tony.luck@intel.com>
98 lines
3.1 KiB
C
98 lines
3.1 KiB
C
#ifndef _ASM_IA64_DMA_MAPPING_H
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#define _ASM_IA64_DMA_MAPPING_H
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/*
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* Copyright (C) 2003-2004 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*/
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#include <asm/machvec.h>
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#include <linux/scatterlist.h>
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#define dma_alloc_coherent platform_dma_alloc_coherent
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/* coherent mem. is cheap */
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static inline void *
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dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t flag)
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{
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return dma_alloc_coherent(dev, size, dma_handle, flag);
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}
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#define dma_free_coherent platform_dma_free_coherent
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static inline void
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dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t dma_handle)
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{
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dma_free_coherent(dev, size, cpu_addr, dma_handle);
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}
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#define dma_map_single_attrs platform_dma_map_single_attrs
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static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
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size_t size, int dir)
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{
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return dma_map_single_attrs(dev, cpu_addr, size, dir, NULL);
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}
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#define dma_map_sg_attrs platform_dma_map_sg_attrs
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static inline int dma_map_sg(struct device *dev, struct scatterlist *sgl,
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int nents, int dir)
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{
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return dma_map_sg_attrs(dev, sgl, nents, dir, NULL);
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}
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#define dma_unmap_single_attrs platform_dma_unmap_single_attrs
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static inline void dma_unmap_single(struct device *dev, dma_addr_t cpu_addr,
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size_t size, int dir)
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{
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return dma_unmap_single_attrs(dev, cpu_addr, size, dir, NULL);
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}
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#define dma_unmap_sg_attrs platform_dma_unmap_sg_attrs
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static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sgl,
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int nents, int dir)
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{
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return dma_unmap_sg_attrs(dev, sgl, nents, dir, NULL);
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}
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#define dma_sync_single_for_cpu platform_dma_sync_single_for_cpu
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#define dma_sync_sg_for_cpu platform_dma_sync_sg_for_cpu
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#define dma_sync_single_for_device platform_dma_sync_single_for_device
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#define dma_sync_sg_for_device platform_dma_sync_sg_for_device
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#define dma_mapping_error platform_dma_mapping_error
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#define dma_map_page(dev, pg, off, size, dir) \
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dma_map_single(dev, page_address(pg) + (off), (size), (dir))
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#define dma_unmap_page(dev, dma_addr, size, dir) \
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dma_unmap_single(dev, dma_addr, size, dir)
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/*
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* Rest of this file is part of the "Advanced DMA API". Use at your own risk.
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* See Documentation/DMA-API.txt for details.
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*/
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#define dma_sync_single_range_for_cpu(dev, dma_handle, offset, size, dir) \
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dma_sync_single_for_cpu(dev, dma_handle, size, dir)
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#define dma_sync_single_range_for_device(dev, dma_handle, offset, size, dir) \
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dma_sync_single_for_device(dev, dma_handle, size, dir)
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#define dma_supported platform_dma_supported
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static inline int
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dma_set_mask (struct device *dev, u64 mask)
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{
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if (!dev->dma_mask || !dma_supported(dev, mask))
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return -EIO;
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*dev->dma_mask = mask;
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return 0;
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}
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extern int dma_get_cache_alignment(void);
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static inline void
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dma_cache_sync (struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction dir)
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{
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/*
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* IA-64 is cache-coherent, so this is mostly a no-op. However, we do need to
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* ensure that dma_cache_sync() enforces order, hence the mb().
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*/
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mb();
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}
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#define dma_is_consistent(d, h) (1) /* all we do is coherent memory... */
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#endif /* _ASM_IA64_DMA_MAPPING_H */
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